Datasheet

Features
82 Dual-Core Intel
®
Xeon
®
Processor 7000 Series Datasheet
NOTES:
1. This is an 8-bit field. The device which sent the alert will respond to the ARA Packet with its address in the
seven most significant bits. The least significant bit is undefined and may return as a ‘1’ or ‘0’. See
Section 7.4.8 for details on the Thermal Sensor Device addressing.
2. The shaded bits are transmitted by the thermal sensor, and the bits that aren’t shaded are transmitted by the
SMBus host controller.
Table 7-6. Read Byte SMBus Packet
S
Slave
Address
Write Ack
Command
Code
Ack S
Slave
Address
Read Ack Data /// P
17-bits 0
18-bits117-bits11 8-bits 1 1
Table 7-7. Send Byte SMBus Packet
S Slave Address Write Ack Command Code Ack P
17-bits 0
18-bits11
Table 7-8. Receive Byte SMBus Packet
S Slave Address Read Ack Data /// P
17-bits 1
1 8-bits 1 1
Table 7-9. ARA SMBus Packet
S ARA Read Ack Address /// P
1 0001 100 1
1 Device Address
1
11