Vol 1

Intel® Xeon® Product 2800/4800/8800 v2 Product Family 89
Datasheet Volume One, February 2014
Electrical Specifications
Notes:
1. V
OS_MAX
is the measured overshoot voltage.
2. T
OS_MAX
is the measured time duration above VccMAX(I1).
3. Istep: Load Release Current Step, for example, I2 to I1, where I2 > I1.
4. VccMAX(I1) = VID - I1*RLL + 15 mV
6.9.3 Signal DC Specifications
Notes:
1. Vtt supplies the PECI interface for Intel® Xeon® E7v2.
2. It is expected that the PECI driver will take into account the variance in the receiver input thresholds and consequently, be
able to drive its output within safe limits.
3. The leakage specification applies to powered devices on the PECI bus.
4. One node is counted for each client and one node for the system host. Extended trace lengths might appear as additional
nodes.
5. Excessive capacitive loading on the PECI line may slow down the signal rise/fall times and consequently limit the maximum bit
rate at which the interface can operate.
Figure 6-5. V
CC
Overshoot Example Waveform
0 5 10 15 20 25 30
Voltage [V]
Time [us]
VccMAX (I1)
VID + V
OS_MAX
T
OS_MAX
V
OS_MAX
Table 6-16. PECI DC Specifications
Symbol Definition and Conditions Min Max Units Figure Notes
1
V
In
Input Voltage Range -0.150 Vtt V
V
Hysteresis
Hysteresis 0.1 * Vtt V
V
N
Negative-edge threshold voltage 0.275 * Vtt 0.50 * Vtt V 6-1 2
V
P
Positive-edge threshold voltage 0.55 * Vtt 0.725 * Vtt V 6-1 2
R
Pullup
Resistance
Pullup Resistance
V
OH
= 0.75 * V
PECI
N/A 50 Ohms
I
Leak+
High impedance state leakage to V
PECI
(V
leak
=
V
OL
)
N/A
50
uA 3
I
Leak-
High impedance leakage to GND
(V
leak
= V
OH
)
N/A
25
uA 3
C
Bus
Bus capacitance per node N/A 10 pF 4,5
V
Noise
Signal noise immunity above 300 MHz 0.1 * Vtt N/A V
p-p