Vol 1

Overview
20 Intel® Xeon® Processor E7-8800/4800/2800 v2 Product Family
Datasheet Volume One, February 2014
1.7 Related Documents
Refer to the following documents for additional information.
Storage Conditions A non-operational state. The processor may be installed in a platform, in a tray,
or loose. Processors may be sealed in packaging or exposed to free air. Under
these conditions, processor landings should not be connected to any supply
voltages, have any I/Os biased or receive any clocks. Upon exposure to “free air”
(that is, unsealed packaging or a device removed from packaging material) the
processor must be handled in accordance with moisture sensitivity labeling
(MSL) as indicated on the packaging material.
TAC Thermal Averaging Constant
TDP Thermal Design Power
TSOD Thermal Sensor on DIMM
UDIMM Unbuffered Dual In-line Module
Uncore The portion of the processor comprising the shared cache, IMC, HA, PCU, UBox,
and Intel QPI link interface.
Unit Interval Signaling convention that is binary and unidirectional. In this binary signaling,
one bit is sent for every edge of the forwarded clock, whether it be a rising edge
or a falling edge. If a number of edges are collected at instances t
1
, t
2
, t
n
,...., t
k
then the UI at instance “n” is defined as:
UI
n
= t
n
- ()t
n
- 1)
V
CC
Processor core power supply
V
SS
Processor ground
V
VMSE
_01, V
VMSE
_23 Variable power supply for the processor system memory interface. VVMSE is the
generic term for VVMSE_01, VVMSE_23.
x1 Refers to a Link or Port with one Physical Lane
x4 Refers to a Link or Port with four Physical Lanes
x8 Refers to a Link or Port with eight Physical Lanes
x16 Refers to a Link or Port with sixteen Physical Lanes
Term Description
Table 1-1. Processor Documents
Document Document Number
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family Datasheet -
Volume Two: Functional Description
329595-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Processor Thermal/Mechanical
Design Guide
329596-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family Specification
Update
329597-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family BSDL
(Boundary Scan Description Language)
329598-001
Table 1-2. Public Specifications (Sheet 1 of 2)
Document Document Number/ Location
Advanced Configuration and Power Interface Specification 3.0 http://www.acpi.info
PCI Local Bus Specification 3.0 http://www.pcisig.com/specifications
PCI Express® Base Specification - Revision 2.1 and 1.1
PCI Express® Base Specification - Revision 3.0 DRAFT
http://www.pcisig.com
System Management Bus (SMBus) Specification http://smbus.org/