Update

32 Intel
®
Xeon
®
Processor E7-8800/4800/2800 Product Families
November 2014 Specification Update
Implication: Software in VMX root operation may execute with the “execute disable” feature enabled
despite the fact that the feature should be disabled by the IA32_MISC_ENABLE MSR.
Intel has not observed this erratum with any commercially available software.
Workaround: A virtual-machine monitor should not allow guest software to write to the
IA32_MISC_ENABLE MSR.
Status: For the steppings affected, see the Summary Tables of Changes.
BP59. Performance Monitor Counter MEM_INST_RETIRED.STORES May
Count Higher than Expected
Problem: Performance Monitoring counter MEM_INST_RETIRED.STORES (Event: 0BH, Umask:
02H) is used to track retired instructions which contain a store operation. Due to this
erratum, the processor may also count other types of instructions including WRMSR
and MFENCE.
Implication: Performance Monitoring counter MEM_INST_RETIRED.STORES may report counts
higher than expected.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.