Hub Datasheet

44 Intel
®
E7505 Chipset MCH Datasheet
Register Description
3.4.1 CONFIG_ADDRESS—Configuration Address Register
Address Offset: 0CF8h
Default Value: 0000 0000h
Attribute: R/W
Size: 32 bits
CONFIG_ADDRESS is a 32-bit register that can be accessed only as a Dword. A “byte” or “word”
reference will pass through the Configuration Address register and HI_A onto the PCI_A bus as an
I/O cycle. The CONFIG_ADDRESS register contains the Bus Number, Device Number, Function
Number, and Register Number for which a subsequent configuration access is intended.
3.4.2 CONFIG_DATA—Configuration Data Register
Address Offset: 0CFCh
Default Value: 0000 0000h
Attribute: R/W
Size: 32 bits
CONFIG_DATA is a 32-bit read/write window into configuration space. The portion of
configuration space that is referenced by CONFIG_DATA is determined by the contents of
CONFIG_ADDRESS.
Bit
Default,
Access
Descriptions
31
0b
R/W
Configuration Enable (CFGE).
1 = Enable.
0 = Disable.
30:24 Reserved (These bits are read only and have a value of 0.)
23:16
00h
R/W
Bus Number. Contains the bus number being targeted by the config cycle.
15:11
00000b
R/W
Device Number. Selects one of the 32 possible devices per bus.
10:8
000b
R/W
Function Number. Selects one of eight possible functions within a device.
7:2
00000b
R/W
Register Number. This field selects one register within a particular Bus, Device, and
Function as specified by the other fields in the Configuration Address register. This
field is mapped to A7:2 during HI_A-D Configuration cycles.
1:0 Reserved
Bit
Default,
Access
Descriptions
31:0
0000h,
R/W
Configuration Data Window (CDW). If bit 31 of CONFIG_ADDRESS is 1, any I/O
access to the CONFIG_DATA register are mapped to configuration space using the
contents of CONFIG_ADDRESS.