Datasheet

Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 2 23
Register Description
Note:
1. Applies only to processors supporting registered DIMMs.
Table 2-12. Device 3, Function 2: Integrated Memory Controller RAS Registers
1
DID VID 00h MC_COR_ECC_CNT_0 80h
PCISTS PCICMD 04h MC_COR_ECC_CNT_1 84h
CCR RID 08h MC_COR_ECC_CNT_2 88h
HDR 0Ch MC_COR_ECC_CNT_3 8Ch
10h MC_COR_ECC_CNT_4 90h
14h MC_COR_ECC_CNT_5 94h
18h 98h
1Ch 9Ch
20h A0h
24h A4h
28h A8h
SID SVID 2Ch
ACh
30h B0h
34h B4h
38h B8h
3Ch BCh
40h C0h
44h C4h
MC_SSRCONTROL 48h
C8h
MC_SCRUB_CONTROL 4Ch
CCh
MC_RAS_ENABLES 50h
D0h
MC_RAS_STATUS 54h
D4h
58h
D8h
5Ch DCh
MC_SSRSTATUS 60h
E0h
64h E4h
68h E8h
6Ch ECh
70h F0h
74h F4h
78h F8h
7Ch FCh