Datasheet

Contents
5
Figures
1 Typical VCCIOPLL, VCCA and VSSA Power Distribution ..................................14
2 Phase Lock Loop (PLL) Filter Requirements ......................................................15
3 AC Test Circuit ....................................................................................................26
4 TCK Clock Waveform..........................................................................................26
5 Differential Clock Waveform................................................................................27
6 System Bus Common Clock Valid Delay Timings...............................................27
7 System Bus Reset and Configuration Timings....................................................28
8 Source Synchronous 2X (Address) Timings .......................................................28
9 Source Synchronous 4X Timings........................................................................29
10 Power-On Reset and Configuration Timings.......................................................29
11 Test Reset Timings .............................................................................................30
12 BCLK[1:0] Signal Integrity Waveform..................................................................32
13 Low-to-High System Bus Receiver Ringback Tolerance.....................................33
14 High-to-Low System Bus Receiver Ringback Tolerance.....................................33
15 Maximum Acceptable Overshoot/Undershoot Waveform ...................................41
16 Exploded View of Processor Components on a System Board ..........................43
17 Processor Package .............................................................................................44
18 Processor Cross-Section and Keep-in ................................................................45
19 Processor Pin Detail............................................................................................46
20 IHS Flatness Specification ..................................................................................46
21 Processor Markings.............................................................................................48
22 Processor Pinout Diagram - Bottom View ...........................................................49
23 Example Thermal Solution (Not to scale)............................................................71
24 Guideline Locations for Case Temperature (TCASE) Thermocouple Placement73
25 Technique for Measuring with 0 Degree Angle Attachment................................73
26 Technique for Measuring with 90 Degree Angle Attachment..............................73
27 Stop Clock State Machine...................................................................................76
28 Mechanical Representation of the Boxed Pentium 4 Processor .........................81
29 Side View Space Requirements for the Boxed Processor ..................................82
30 Top View Space Requirements for the Boxed Processor ...................................83
31 Boxed Processor Fan Heatsink Power Cable Connector Description.................84
32 Acceptable System Board Power Header Placement
Relative to Processor Socket ..............................................................................85
33 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view).86
34 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 2 view).86
35 Boxed Processor Fan Heatsink Set Points .........................................................87