Desktop 4th Generation Specification Sheet
Table Of Contents
- Contents
- Revision History
- 1.0 Introduction
- 2.0 Interfaces
- 3.0 Technologies
- 3.1 Intel® Virtualization Technology (Intel® VT)
- 3.2 Intel® Trusted Execution Technology (Intel® TXT)
- 3.3 Intel® Hyper-Threading Technology (Intel® HT Technology)
- 3.4 Intel® Turbo Boost Technology 2.0
- 3.5 Intel® Advanced Vector Extensions 2.0 (Intel® AVX2)
- 3.6 Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI)
- 3.7 Intel® Transactional Synchronization Extensions - New Instructions (Intel® TSX-NI)
- 3.8 Intel® 64 Architecture x2APIC
- 3.9 Power Aware Interrupt Routing (PAIR)
- 3.10 Execute Disable Bit
- 3.11 Supervisor Mode Execution Protection (SMEP)
- 4.0 Power Management
- 4.1 Advanced Configuration and Power Interface (ACPI) States Supported
- 4.2 Processor Core Power Management
- 4.3 Integrated Memory Controller (IMC) Power Management
- 4.4 PCI Express* Power Management
- 4.5 Direct Media Interface (DMI) Power Management
- 4.6 Graphics Power Management
- 5.0 Thermal Management
- 5.1 Desktop Processor Thermal Profiles
- 5.2 Thermal Metrology
- 5.3 Fan Speed Control Scheme with Digital Thermal Sensor (DTS) 1.1
- 5.4 Fan Speed Control Scheme with Digital Thermal Sensor (DTS) 2.0
- 5.5 Processor Temperature
- 5.6 Adaptive Thermal Monitor
- 5.7 THERMTRIP# Signal
- 5.8 Digital Thermal Sensor
- 5.9 Intel® Turbo Boost Technology Thermal Considerations
- 6.0 Signal Description
- 6.1 System Memory Interface Signals
- 6.2 Memory Reference and Compensation Signals
- 6.3 Reset and Miscellaneous Signals
- 6.4 PCI Express*-Based Interface Signals
- 6.5 Display Interface Signals
- 6.6 Direct Media Interface (DMI)
- 6.7 Phase Locked Loop (PLL) Signals
- 6.8 Testability Signals
- 6.9 Error and Thermal Protection Signals
- 6.10 Power Sequencing Signals
- 6.11 Processor Power Signals
- 6.12 Sense Signals
- 6.13 Ground and Non-Critical to Function (NCTF) Signals
- 6.14 Processor Internal Pull-Up / Pull-Down Terminations
- 7.0 Electrical Specifications
- 8.0 Package Mechanical Specifications
- 9.0 Processor Ball and Signal Information
PCI Express*-Based Interface Signals
Table 34. PCI Express* Graphics Interface Signals
Signal Name Description Direction / Buffer Type
PEG_RCOMP
PCI Express Resistance Compensation I
A
PEG_RXP[15:0]
PEG_RXN[15:0]
PCI Express Receive Differential Pair I
PCI Express
PEG_TXP[15:0]
PEG_TXN[15:0]
PCI Express Transmit Differential Pair O
PCI Express
Display Interface Signals
Table 35. Display Interface Signals
Signal Name Description Direction / Buffer
Type
FDI_TXP[1:0]
FDI_TXN[1:0]
Intel Flexible Display Interface Transmit Differential Pair O
FDI
DDIB_TXP[3:0]
DDIB_TXN[3:0]
Digital Display Interface Transmit Differential Pair O
FDI
DDIC_TXP[3:0]
DDIC_TXN[3:0]
Digital Display Interface Transmit Differential Pair O
FDI
DDID_TXP[3:0]
DDID_TXN[3:0]
Digital Display Interface Transmit Differential Pair O
FDI
FDI_CSYNC
Intel Flexible Display Interface Sync I
CMOS
DISP_INT
Intel Flexible Display Interface Hot-Plug Interrupt I
Asynchronous
CMOS
Direct Media Interface (DMI)
Table 36. Direct Media Interface (DMI) – Processor to PCH Serial Interface
Signal Name Description Direction / Buffer
Type
DMI_RXP[3:0]
DMI_RXN[3:0]
DMI Input from PCH: Direct Media Interface receive
differential pair.
I
DMI
DMI_TXP[3:0]
DMI_TXN[3:0]
DMI Output to PCH: Direct Media Interface transmit
differential pair.
O
DMI
6.4
6.5
6.6
Processor—Signal Description
Desktop 4th Generation Intel
®
Core
™
Processor Family, Desktop Intel
®
Pentium
®
Processor Family, and Desktop Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2 December 2013
86 Order No.: 328897-004