Data Sheet

Interconnects—Ethernet Controller I210
87
3.6 Voltage Regulator
To reduce Bill of Material (BOM) cost, the I210 supports generating the 1.5V and 0.9V power supplies
from the 3.3V supply using an on-chip Switching Capacitor Voltage Regulator (SVR) control circuit,
which requires only an external capacitor component.
Refer to Section 11.6.6 for more details.
3.7 Network Interfaces
3.7.1 Overview
The I210 MAC provides a complete CSMA/CD function supporting IEEE 802.3 (10 Mb/s), 802.3u (100
Mb/s), 802.3z and 802.3ab (1000 Mb/s) implementations. The I210 performs all of the functions
required for transmission, reception, and collision handling called out in the standards.
The I210 supports the following potential configurations:
• Internal copper PHY.
• External SerDes device such as an optical SerDes (SFP or on board) or backplane (1000BASE-BX or
1000BASE-KX) connections.
• External SGMII device. This mode is used for connections to external 10/100/1000 BASE-T PHYs
that support the SGMII MAC/PHY interface.
Selecting between the various configurations is programmable via the MAC's the Extended Device
Control register (CTRL_EXT.LINK_MODE bits) and default is set via Flash settings. Table 3-22 lists the
encoding on the LINK_MODE field for each of the modes.
The GMII/MII interface, used to communicate between the MAC and the external PHY or the SGMII
PCS, supports 10/100/1000 Mb/s operation, with both half- and full-duplex operation at 10/100 Mb/s,
and only full-duplex operation at 1000 Mb/s. Board design link path should include AC coupling
capacitors.
The SerDes function can be used to implement a fiber-optics-based solution or backplane connection
without requiring an external TBI mode transceiver/SerDes.
The SerDes interface can be used to connect to SFP modules. As such, this SerDes interface has the
following limitations:
• No Tx clock
• AC coupling only
Table 3-22. Link Mode Encoding
Link Mode I210 Mode
00b Internal PHY
01b 1000BASE-KX
10b SGMII
11b SerDes/1000BASE-BX