Data Sheet

Design Considerations—Ethernet Controller I210
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Note: The DEV_OFF_N pin should maintain its state during system reset and system sleep states. It
should also insure the proper default value on system power up. For example, a designer
could use a GPIO pin that defaults to 1b (enable) and is on system suspend power. For
example, it maintains the state in S0-S5 ACPI states).
12.8.1 BIOS Handling of Device Disable
Assume that in the following power-up sequence the DEV_OFF_N signal is driven high (or it is already
disabled)
1. The PCIe is established following the GIO_PWR_GOOD.
2. BIOS recognizes that the entire I210 should be disabled.
3. The BIOS drives the DEV_OFF_N signal to the low level.
4. As a result, the I210 samples the DEV_OFF_N signals and enters either the device disable mode.
5. The BIOS could put the link in the Electrical IDLE state (at the other end of the PCIe link) by
clearing the Link Disable bit in the Link Control register.
6. BIOS might start with the device enumeration procedure (the entire I210 functions are invisible).
7. Proceed with normal operation
8. Re-enable could be done by driving high the DEV_OFF_N signal, followed later by bus enumeration.