Data Sheet

Ethernet Controller I210 —Design Considerations
834
12.7.2 Ethernet Controller I210 Power Sequencing
Designs must comply with power sequencing requirements to avoid latch-up and forward-biased
internal diodes (see Figure 12-23).
The general guideline for sequencing is:
1. Power up the 3.3 Vdc rail.
2. Power up the 1.5 Vdc next.
3. Power up the 0.9 Vdc rail last.
For power down, there is no requirement (only charge that remains is stored in the decoupling
capacitors).
Figure 12-23.Power Sequencing Guideline
12.7.2.1 Power Up Sequence (External Voltage Regulator)
The board designer controls the power up sequence with the following stipulations (see Figure 12-24):
• 1.5 Vdc must not exceed 3.3 Vdc by more than 0.3 Vdc.
• 0.9 Vdc must not exceed 1.5 Vdc by more than 0.3 Vdc.
• 0.9 Vdc must not exceed 3.3 Vdc by more than 0.3 Vdc.
VDD3p3
VDD1p5
VDD0p9