Data Sheet
Interconnects—Ethernet Controller I210
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8. Read the iNVM line programmed via iNVM_DATA[2n] and iNVM_DATA[2n+1] registers read.
a. If not all the bits were properly written, repeat steps 4 to 8 until all bits are properly written.
9. Optionally, lock the line programmed by setting iNVM_LOCK[n].LOCK register bit to 1b.
a. Wait 10 s for the lock to take effect.
b. Read the iNVM_LOCK[n].LOCK register bit to check it is read as 1b.
c. If it is not read as 1b, repeat step 9 until it reads as 1b.
10. Program a new line if needed by repeating step 3.
11. When the iNVM programming sequence completes, write to the iNVM_PROTECT register with
0x00000000.
Note: Reading the iNVM can be done directly by read access to the iNVM_DATA[0-63] registers.
Locking a programmed line at step 8 avoids any possibility in the future to invalidate the line
by writing the Type field with 111b.
In case no Flash part with a valid contents is attached, the new OTP settings will take effect
either after a power-up cycle or if mirroring the whole OTP contents into the shadow RAM and
initiating a PCIe reset. The later option does not concern items that load only at power-up
(refer to Table 3-27).
3.4.4 Hardware Load of iNVM Values into Internal Structures
After every reset, hardware goes over the iNVM, reading and parsing its structures. If a structure is
valid and its reset type matches the initiated reset, hardware loads the word or CSR from the iNVM
structure into its internal hardware structures.
If an iNVM structure type is read as 111b, hardware skips that Dword, and any following Dword starting
with that type field.
If a type field is read as 000b, hardware stops parsing the iNVM and concludes.
In a 2 Kb iNVM, there is room for programming up to 64 words or 32 CSRs. For example, programming
the MAC address consumes three auto-load word structures.
Once an iNVM structure is written, there is no way to modify its value other than invalidating its type
field (type=111b). iNVM structures can be constructed to rewrite or replace previous iNVM structures, if
such a change is required. For instance, assuming PCI configuration and various workarounds require 5
CSR structures and 5 word auto-load ones, then 68 iNVM words remain un-programmed, which leaves
enough room for additional word and CSR rewrites, if needed.
3.4.5 Software Load of Default Values into Internal Structures
On every reset event of the I210, software is able to re-load new default values into the internal
hardware structures as if the settings were auto-loaded by hardware from the shadow RAM. This ability
is referred to as auto-load bus write by software. It is aimed to avoid wasting iNVM lines with settings
that can be handled by software.
The following flow is used by software:
1. Write the iNVM word address and data to be loaded in the device via EEARBC register write. Refer
to Table 6-1 iNVM words that are used by hardware.
2. Wait until the EEARBC.DONE bit is set by hardware.
3. Load new iNVM words into the hardware structures by repeating steps 1 and 2 as needed.