Data Sheet

Ethernet Controller I210 —Electrical/Mechanical Specification
794
Table 11-11. Flash I/F Timing Parameters
Symbol Parameter Pad Name Min Typ Max Units Note
f
SCK
Serial Clock (SCK) frequency
for all instructions
NVM_SK 3.125 MHz After power on.
f
SCK
Serial Clock (SCK) frequency
for all instructions (word
0x11 loaded)
NVM_SK 12.5 MHz
Dependent on the value of
the Flash Speed field.
f
SCK
Serial Clock (SCK) frequency
for all instructions (LAN PLL
operational)
NVM_SK 62.5 MHz
Dependent on the value of
the FLASHMODE.FLASH_
SPEED field.
See note [1].
t
SCKH
SCK high time NVM_SK 7.1 7.8 ns
t
SCKL
SCK low time NVM_SK 7.1 8.2 ns
t
SCKR
SCK rise time, peak-to-peak
(Slew Rate)
NVM_SK 0.1+0.2 0.7 V/ns
t
SCKF
SCK fall time, peak-to-peak
(Slew Rate)
NVM_SK 0.1+0.2 0.7 V/ns
t
CSHS
CS high setup time
(relative to SCK)
NVM_CS_N
(NVM_SK)
N/A N/A N/A ns
Device will not output a clock
when NVM_CS_N is high.
t
CSHH
CS high hold time
(relative to SCK)
NVM_CS_N
(NVM_SK)
N/A N/A N/A ns
Device will not output a clock
when NVM_CS_N is high.
t
CSLS
CS Low setup time
NVM_CS_N
(NVM_SK)
6.5 9.2 ns
t
CSLH
CS Low hold time
NVM_CS_N
(NVM_SK)
7ns
t
CSH
CS High time
NVM_CS_N
(NVM_SK)
16 104 136 ns
t
DS
Data-out setup time
NVM_SI
(NVM_SK)
2+2 7.9 ns
t
DH
Data-out hold time
NVM_SI
(NVM_SK)
5+2 8 ns
t
V
Data-out valid time
NVM_SO
(NVM_SK)
0710ns
Notes:
1. In bit banging mode, the clock is toggled by software at a much lower rate.