Data Sheet

Ethernet Controller I210 —Interconnects
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3.4 iNVM
The I210 can operate with no Flash attached (Flash-less mode). The I210 incorporates an on-die
internal NVM (iNVM) memory (size 2 Kb) that enables designers to internally program the I210 with a
subset of the default values that are normally associated with an external Flash. iNVM is similar to One
Time Programmable (OTP) memory except that it allows for a limited number of modifications and
corrections after initial programming. The iNVM has a capacity of 64 words, or 32 two-word CSR
entries. A word, once used, cannot be rewritten. The initial programming will take a number of these,
and each new entry takes additional words until the capacity is reached. For example, programming the
MAC address consumes three auto-load word structures.
The last two words of the iNVM (62-63) are used for manufacturing identification information. Word 61
is written with version information when the iNVM is programmed using Intel tools. The contents of
these words do not affect the operation of the device.
Refer to the note in Section 1.4.3 for the functional limitation that exists when the I210 operates
without an external Flash part.
This section describes the iNVM structure for the I210.
3.4.1 iNVM Contents
The iNVM memory is used there to store and program the default values that are otherwise
programmed via auto-load from the external Flash memory. The list of programmable values includes
the following (amongst others):
• MAC address - words 0x00, 0x01, 0x02
PCIe Init Configuration 3 0x1A 7 Y Y
PCIe Control 1 0x1B 8 Y Y
LEDCTL 1 Default LAN 0x1C 24 Y Y
Device Rev ID 0x1E 14 Y Y
LEDCTL 0 Default LAN 0x1F 25 Y Y
Software Defined Pins Control -
LAN
0x20 32 Y Y Y
Functions Control 0x21 13 Y Y
LAN Power Consumption 0x22 22 Y Y
PCIe Reset Configuration Pointer
and PCIe Reset CSR Auto
Configuration Structures - LAN
0x23 26 Y Y
Init Control 3 LAN 0x24 23 Y Y
CSR Auto Configuration Power-Up
LAN
0x27 3 Y
PCIe Control 2 0x28 9 Y Y
PCIe Control 3 0x29 10 Y Y
Watchdog Configuration 0x2E 34 Y Y Y
1. After asserting CTRL.DEV_RST by software partial load of parameters relevant to the port is done. Assertion of
CTRL_EXT.EE_RST causes load of port parameters similar to CTRL.RST.
2. Loaded only if load subsystem ID bit is set.
Table 3-18. Shadow RAM Auto-Load Sequence
Flash Word Name
Flash Word
Address
Loading
Order
Full Load
(Power-up)
Full Load
No MGMT
(PCI RST)
Software
1
Reset Port
Load