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Data Sheet

ManualsBrandsIntel ManualsComputing & OfficeIntel Intel Ethernet Server Adapter I210-T1 - Network adapter 1 Gbps LAN (10/100/1000 Mbps), PCI-Express
71727374757677787980
Interconnects—Ethernet Controller I210
73
Figure 3-7. Organization of the NVM That Supports 0.5 MB Flash Parts
3.3.9.2 Flow for Updating the Firmware Secured Module
In order to protect the Flash update procedure from power-down events, a double image policy is
required each time the firmware code is updated. The software should proceed as follows:
1. Take ownership over the Flash via the semaphore bits. Refer to Section 4.6.
2. Read the pointer to the Firmware Secured Module (word 0x10), which is the current location of the
module, and read the pointer to the free provisioning area (word 0x40). Exactly 244 KB (or 448 KB)
must be provided to the free space provisioning area segment, even if the enclosed firmware code
size is smaller. Check that the free provisioning area size read from word 0x41 is greater or equal to
the size of the new firmware image to be loaded in NVM.
a. If not, exit the flow. It is assumed that the Intel person responsible for the update first updates
the free area pointer and size fields so that they define a larger free area.
3. Initiate sector erase instructions to the entire free space provisioning segment.
a. In order to guaranty Flash semaphore ownership time does not exceed the 3 sec timeout, it is
recommended to perform at this step no more than four 4 KB sector erase operations at once in
a burst, releasing semaphore ownership for 10 ms in between. This way, other entities can insert
Flash read accesses in between burst without waiting for completion of the entire update
process, which might take minutes.
4. Write the new firmware secured module at the location pointed by the free space provisioning
segment pointer via Flash-mode access (memory mapped or FLSW* register set).
a. For the same reason as before, it is recommended to write at this step no more than four 4 KB
sectors at once in a burst, releasing semaphore ownership for 10 ms in between.
5. Write the FLFWUPDATE.Update bit to 1b.
Legacy EEPROM
(ba nk 1)
4Mbit FLASH
1
Free Provisioning
Area
Legacy EEPROM
(ba nk 0)
Sh adowRAM
EEPROM Image
Update
Use
Firmw are Image
244 KB
244 KB
C SS Header
Flash T able
RO Update Section
mDNS Records
16 KB
Secured A rea
4 KB
4 KB
4 KB
mDNS offset = 0x803D
16 K B