Data Sheet

Ethernet Controller I210 —Interconnects

Two software entities cannot use the semaphore mechanism: BIOS and VPD software.

• Since VPD software accesses only the VPD module, which is located in the first valid sector of the

Flash, VPD accesses are always performed against the shadow RAM first. In this case, firmware

must take/release ownership over the Flash before dumping the VPD changes into the Flash, as if it

was the originator of the Flash access. Shadow RAM dump sequence is described in Section 3.3.2.

• No contention can occur between BIOS and any other software entity (VPD included) as it accesses

the Flash while the operating system is down.

• Contention between BIOS and firmware can however happen if a system reboot occurs while the

MC is accessing the Flash.

— If a system reboot is caused by a user pressing the Standby button, it is required to route the

wake-up signal from the Standby button to the MC and not to the chipset. The MC issues a

system reboot signal to the chipset only after the Flash write access completes. Firmware is

responsible to poll whether the Flash write has completed before sending the response to the

MC NC-SI command.

— If a system reboot is issued by a local user on the host, there is no technical way to avoid Flash

access contention between BIOS and the MC.

Caution: It is the user’s responsibility when accessing the Flash remotely via the MC to make sure

another user is not currently initiating a local host reboot there.

Notes:

The MAC auto-load from the Flash device itself occurs only after power-up and before host or

firmware can attempt to access the Flash. The host must wait until PCIe reset is de-asserted

(after ~1 sec, which is enough time for the MAC auto-load to complete).

Software and firmware should avoid holding Flash ownership (via the dedicated semaphore

bit) for more than 2 seconds.

Software erase command can be suspended by firmware until it handles its current tasks and/

or it loads its cache.

3.3.4.1 Arbitration Between Flash Clients

The following lists the relative priority by which the hardware must serve the different Flash clients,

whether the access is performed against the internal shadow RAM or into the Flash device:

1. Hardware auto-load - no semaphore taking.

Pointer to an hardware module must first be invalidated (set to 0xFFFF) by the host/MC before

modifying the module by a sequence of related changes. A sequence of related changes is a

sequence of Flash writes that if interrupted in the middle would leave the hardware module with

non-consistent contents. There is still a risk of inconsistent Flash header words being loaded by

hardware if the auto-load process occurs in the middle of a write sequence performed over the

Flash header. This risk exists in all previous 1 GbE controllers.

2. Hardware cache read for the firmware - no semaphore taking.

This access is served by hardware with a 10:1 ratio relatively to the accesses that follow.

The tens of cache read accesses (8-byte Flash read each) that might be performed before a

memory mapped Flash access is served (see Steps 4 and 6) should not cause a timeout of the PCIe

transaction.