Data Sheet

PCIe Programming Interface—Ethernet Controller I210
613
9.4.6.13 Link Control 2 (0xD0; RW)
12:11 RO 0x0 Reserved.
14:13
RW/
RO
00b Reserved.
15 RO 0 Reserved.
1. The completion timeout value must be programmed correctly in PCIe configuration space (in Device Control 2 Register); the value
must be set above the expected maximum latency for completions in the system in which the I210 is installed. This ensures that
the I210 receives the completions for the requests it sends out, avoiding a completion timeout scenario. It is expected that the
system BIOS sets this value appropriately for the system.
Bits R/W Default Description
3:0 RWS 0001b
Tar g et Link S peed.
This field is used to set the target compliance mode speed when software is using the Enter
Compliance bit to force a link into compliance mode.
Defined encodings are:
0001b = 2.5 Gb/s Target Link Speed.
0010b = Not supported (5 Gb/s Target Link Speed).
All other encodings are reserved.
If a value is written to this field that does not correspond to a speed included in the Max
Link Speed field, the result is undefined.
The default value of this field is the highest link speed supported by the I210 (as reported
in the Max Link Speed field of the Link Capabilities register).
4RWS0b
Enter Compliance.
Software is permitted to force a link to enter compliance mode at the speed indicated in the
Target Link Speed field by setting this bit to 1b in both components on a link and then
initiating a hot reset on the link.
The default value of this field following a fundamental reset is 0b.
5RO0b
Hardware Autonomous Speed Disable.
When set to 1b, this bit disables hardware from changing the link speed for reasons other
than attempting to correct unreliable link operation by reducing link speed.
Bit is Hard wired to 0b.
6RO0b
Selectable De-emphasis
This bit is not applicable and reserved for Endpoints.
9:7 RWS 000b
Transmit Margin
This field controls the value of the non de emphasized voltage level at the Transmitter pins.
Encodings:
000b = Normal operating range
001b = 800-1200 mV for full swing
010b = (n-1) - Values must be monotonic with a non-zero slope. The value of n must be
greater than 3 and less than 7. At least two of these must be below the normal operating
range of n: 200-400 mV for full-swing
n = 111b reserved.
Note: No support to half-swing (low-swing).
10 RWS 0b
Enter Modified Compliance
When this bit is set to 1b, the device transmits modified compliance pattern if the LTSSM
enters Polling.Compliance state.
Bit
location
R/W Default Description