Data Sheet

Ethernet Controller I210 —PCIe Programming Interface
600
In contrast to the MSI capability structure, which directly contains all of the control/status information
for the function's vectors, the MSI-X capability structure instead points to an MSI-X table structure and
a MSI-X Pending Bit Array (PBA) structure, each residing in memory space.
Each structure is mapped by a Base Address Register (BAR) belonging to the function, located
beginning at 0x10 in configuration space. A BAR Indicator Register (BIR) indicates which BAR, and a
Qword-aligned offset indicates where the structure begins relative to the base address associated with
the BAR. The BAR is permitted to be either 32-bit or 64-bit, but must map to memory space. A function
is permitted to map both structures with the same BAR, or to map each structure with a different BAR.
The MSI-X table structure,
listed in Section 8.9, typically contains multiple entries, each consisting of
several fields: message address, message upper address, message data, and vector control. Each entry
is capable of specifying a unique vector.
The PBA structure, described in the same section, contains the function's pending bits, one per Table
entry, organized as a packed array of bits within Qwords. Note that the last Qword might not be fully
populated.
To request service using a given MSI-X table entry, a function performs a Dword memory write
transaction using:
The contents of the Message Data field entry for data.
The contents of the Message Upper Address field for the upper 32 bits of the address.
The contents of the Message Address field entry for the lower 32 bits of the address.
A memory read transaction from the address targeted by the MSI-X message produces undefined
results.
The MSI-X table and MSI-X PBA are permitted to co-reside within a naturally aligned 4 KB address
range, though they must not overlap with each other.
MSI-X table entries and Pending bits are each numbered 0 through N-1, where N-1 is indicated by the
Table Size field in the MSI-X Message Control register. For a given arbitrary MSI-X table entry K, its
starting address can be calculated with the formula:
Entry starting address = Table base + K*16
For the associated Pending bit K, its address for Qword access and bit number within that Qword can be
calculated with the formulas:
Qword address = PBA base + (K div 64)*8
Qword bit# = K mod 64
Software that chooses to read Pending bit K with Dword accesses can use these formulas:
Dword address = PBA base + (K div 32)*4
Dword bit# = K mod 32
The I210 also supports the table-less MSI-X mode, where a single interrupt vector is provided. The
MSI-X table and MSI-X PBA are not used. Instead, the capability structure includes several additional
fields (Message Address, Message Address Upper, and Message Data) for vector configuration. The
I210 embeds the number of the original MSI-X vectors (i.e. the vectors supported if the number of
vectors was not limited to 1) in the LSB bits of the Message Data field.