Data Sheet

Ethernet Controller I210 —PCIe Programming Interface
594
9.3.12 CardBus CIS (0x28; RO)
Not used. Hardwired to zero.
9.3.13 Subsystem Vendor ID (0x2C; RO)
This value can be loaded automatically from Flash address 0x0C at power up or reset. A value of
0x8086 is the default for this field at power up if the Flash does not respond or is not programmed.
9.3.14 Subsystem ID (0x2E; RO)
This value can be loaded automatically from Flash address 0x0B at power up with a default value of
0x0000.
9.3.15 Expansion ROM Base Address (0x30; RW)
This register is used to define the address and size information for boot-time access to the optional
Flash memory. Expansion ROM is enabled by placing 0b in the LAN Boot Disable Flash bit. This register
returns a zero value for function without an Expansion ROM window.
Address Space
(Low register for
64bit Memory
BARs)
31:4 R/W
The length of the RW bits and RO 0b bits depend on the mapping window sizes. Init value of
the RW fields is 0x0.
Mapping Window RO bits
Memory CSR + FLASH BAR size depends on BARCTRL.FLBARSize and
BARCTRL.CSRSize fields.
16:4 for 128KB
17:4 for 256KB
and so on...
MSI-X space is 16KB 13:4
I/O spaces size is 32 bytes 4
Field Bit(s) R/W Initial Value Description
En 0 RO 0b
1b = Enables Expansion ROM access.
0b = Disables Expansion ROM access.
Reserved 10:1 RO 0b Always read as 0b. Writes are ignored.
Address 31:11 R/W 0b
Read-write bits are hard wired to 0b and dependent on the memory mapping
window size. The LAN Expansion ROM spaces can be either 512 KB to 8 MB in
powers of 2. Mapping window size is set by the FLBAR_size Flash field.
Note: Increasing the FLBAR_size beyond 1 MB does not increase the Flash
area that can be accessed through the EXPROM BAR (see Section 3.3.3.1).
Table 9-6. Base Address Registers' Fields
Field Bits R/W Description