Data Sheet

Programming Interface — Ethernet Controller I210
543
8.25.3 DMA Coalescing Management Threshold - DMCMNGTH
(0x8F30;RW)
8.25.4 DMA Coalescing Time to Lx Request - DMCTLX (0x2514;RW)
8.25.5 DMA Coalescing Current Rx Count - DMCCNT (0x5DD4;RO)
Field Bit(s) Initial Value Description
Reserved 3:0 0b
Reserved.
Write 0x0, ignore on read.
DMCMNGTHR 19:4 0x100
DMA Coalescing Management Threshold.
This value defines the DMA coalescing management threshold in 16 byte units. When
the amount of empty space in the internal transmit buffer exceeds the DMCMNGTHR
value, DMA coalescing is stopped and PCIe moves to an L0 state.
Note: If this value is 0x0, a condition to move out of DMA coalescing due to the
passing of the DMA coalescing management threshold level is disabled.
Under some conditions, there can be a deviation of up to 16-bytes from the
value written in this field.
Reserved 31:20 0b
Reserved.
Write 0x0, ignore on read.
Field Bit(s) Initial Value Description
Reserved 11:0 0x20
Reserved.
Write 0x20, ignore on read.
EN_MNG_IND 12 0b
Enable Management Indications for OBFF Operation.
When set, OBFF and DMA coalescing functionality is affected from the management
buffer status indications.
Reserved 30:13
Reserved.
Write 0x0, ignore on read.
DCFLUSH_DIS 31 0b
Disable DMA Coalescing Flush.
When this bit is set, the flush of pending interrupts and pending descriptor write-back
operations before entry into DMA Coalescing (refer to Section 5.9.2.1) is disabled.
Field Bit(s) Initial Value Description
CCOUNT 24:0 0x0
DMA Coalescing Receive Traffic Current Count.
Represents the count of receive traffic in the current time interval in units of 64-byte
segments. Refer to Section 5.9 for additional information.
Note: Counter does not wrap around.
RSVD 31:25 0x0
Reserved.
Write 0x0, ignore on read.