Data Sheet

Ethernet Controller I210 — Programming Interface
540
8.24.7 PCIe ECC Status Register - PCIEECCSTS (0x5BAC; R/W1C)
8.24.8 PCIe ACL0 and ACL1 Register - PCIACL01 (0x5B7C; RO to Host)
Note: Reset by PCIe reset.
8.24.9 PCIe ACL2 and ACL3 Register - PCIACL23 (0x5B80; RO to Host)
Note: Reset by PCIe reset.
8.24.10 LAN Port Parity Error Control Register - LANPERRCTL (0x5F54;
RW)
Field Bit(s)
Initial
Value
Description
Reserved 3:0 0 Reserved
ECC ERR TX WR DATA 4 0b
Tx Write Request Data ECC Correctable Error
ECC ERR RETRY BUF 5 0b
TX Retry Buffer ECC Correctable Error
Reserved 31:6 0x0
Reserved
Write 0, ignore on read
Field Bit(s)
Initial
Value
Description
ACL0 15:0 0 One of the four ACLs.
ACL1 31:16 0 One of the four ACLs.
Field Bit(s)
Initial
Value
Description
ACL2 15:0 0 One of the four ACLs.
ACL3 31:16 0 One of the four ACLs.
Field Bit(s)
Initial
Value
Description
Reserved 8:0 0x0
Reserved.
Write 0x0, ignore on read.
retx_buf_en 9 1b
Enable retx_buf parity error indication
When set to 1b, enables the RETX buffer (re-transmit buffer) parity error detection and
indication.
Reserved 31:10 0x0
Reserved.
Write 0x0, ignore on read.