Data Sheet

Programming Interface — Ethernet Controller I210
533
These registers contain the upper bits of the 48-bit Ethernet address. The complete address is {MMAH,
MMAL}. The MMAH registers are written by the MC and are not accessible to the host for writing. The
registers are used to filter manageability packets. See Section 10.3.
Reset - The MMAL registers are cleared on LAN_PWR_GOOD only. The initial values for this register can
be loaded from the Flash after power-up reset or firmware reset.
Note: The MMAH.MMAH field should be written in network order.
8.22.12 Flexible TCO Filter Table registers - FTFT (0x9400 + 4*n
[n=0...63]; RW)
The Flexible TCO Filter Table registers (FTFT) contains a 128 byte pattern and a corresponding 128-bit
mask array. If enabled, the first 128 bytes of the received packet are compared against the non-
masked bytes in the FTFT register.
The 128 byte filter is composed of 32 Dword entries, where each 2 Dwords are accompanied by an 8-bit
mask, one bit per filter byte. The bytes in each 2 Dwords are written in network order (for example,
byte0 written to bits [7:0], byte1 to bits [15:8] etc.) The mask field is set so that bit0 in the mask
masks byte0, bit 1 masks byte 1 etc. A value of 1 in the mask field means that the appropriate byte in
the filter should be compared to the appropriate byte in the incoming packet.
Note: The mask field must be 8 bytes aligned even if the length field is not 8 bytes aligned, as the
hardware implementation compares 8 bytes at a time so it should get extra masks until the
end of the next Qword. Any mask bit that is located after the length should be set to 0
indicating no comparison should be done.
In case the actual length, which is defined by the length field register and the mask bits, is
not 8 bytes aligned there might be a case that a packet that is shorter than the actual
required length passes the flexible filter. This can occur due to comparison of up to 7 bytes
that come after the packet, but are not a real part of the packet.
The last Dword of the filter contains a length field defining the number of bytes from the beginning of
the packet compared by this filter. If the actual packet length is less than the length specified by this
field, the filter fails. Otherwise, it depends on the result of actual byte comparison. The value should not
be greater than 128.
The initial values for the FTFT registers can be loaded from the Flash after power-up reset. The FTFT
registers are written by the MC and are not accessible to the host for writing. The registers are used to
filter manageability packets as described in Section 10.3.3.6.
Note: The FTFT registers are cleared on LAN_PWR_GOOD and firmware reset only.
Field Bit(s) Initial Value Description
Bit Vector 31:0 X The details of the bit vector are described in Table 8-25.