Data Sheet

Programming Interface — Ethernet Controller I210
475
8.15.18 Frequency Out 0 Control Register FREQOUT0 (0xB654; RW)
8.15.19 Frequency Out 1 Control Register - FREQOUT1 (0xB658; RW)
8.15.20 Auxiliary Time Stamp 0 Register Low - AUXSTMPL0 (0xB65C; RO)
8.15.21 Auxiliary Time Stamp 0 Register High -AUXSTMPH0 (0xB660; RO)
Reading this register releases the value stored in AUXSTMPH/L0 and enables timestamping of the next
value.
8.15.22 Auxiliary Time Stamp 1 Register Low AUXSTMPL1 (0xB664; RO)
Field Bit(s) Initial Value Description
CHCT 29:0 0x0
Clock Out Half Cycle Time. Defines the Half Cycle time of Clock 0 in ns
units. When clock output is enabled, permitted values are any value larger
than 8 and up to including 70,000,000 decimal (70 ms). The following
larger values can be used as long as the output clock is synchronized to
whole seconds as described in section "Synchronized Output Clock on SDP
Pins": 125 ms; 250 ms and 500 ms.
Reserved 31:30 0x0
Reserved.
Write 0x0, ignore on read.
Field Bit(s) Initial Value Description
CHCT 29:0 0x0
Clock Out Half Cycle Time defines the Half Cycle time of Clock 1 in ns units.
When clock output is enabled, permitted values are any value larger than 8
and up to including 70,000,000 decimal (70 ms). The following larger
values can be used as long as the output clock is synchronized to whole
seconds as described in section "Synchronized Output Clock on SDP Pins":
125 ms; 250 ms and 500 ms.
Reserved 31:30 0x0
Reserved.
Write 0x0, ignore on read.
Field Bit(s) Initial Value Description
TSTL 29:0 0x0 Auxiliary Time Stamp 0 LSB value (defined in ns units).
Zero 31:30 0x0 Zero bits.
Field Bit(s) Initial Value Description
TSTH 31:0 0x0 Auxiliary Time Stamp 0 MSB value (defined in second units).
Field Bit(s) Initial Value Description
TSTL 29:0 0x0 Auxiliary Time Stamp 1 LSB value (defined in ns units).
Zero 31:30 0x0 Zero bits.