Data Sheet

Ethernet Controller I210 — Programming Interface
450
8.11 Filtering Register Descriptions
8.11.1 Immediate Interrupt RX - IMIR (0x5A80 + 4*n [n=0...7]; R/W)
This IMIR[n], TTQF[n], and the IMIREXT[n] registers define the filtering required to indicate which
packet triggers a LLI (immediate interrupt). The registers can also be used for queuing and deciding on
the timestamp of a packet.
Notes:
1. The Port field should be written in network order.
2. If one of the actions for this filter is set, then at least one of the IMIR[n].PORT_BP, IMIR[n].Size_BP,
the Mask bits in the TTQF[n] register or the IMIREXT.CtrlBit_BP bits should be cleared.
3. The value of the IMIR and IMIREXT registers after reset is unknown (apart from the
IMIR.Immediate Interrupt bit which is guaranteed to be cleared). Therefore, both registers should
be programmed before an IMIR.Immediate Interrupt is set for a given flow.
Field Bit(s) Initial Value Description
Reserved 28:0 0x0
Reserved.
Write 0x0, ignore on read.
Hide VLAN 29 0b
If this bit is set, a value of zero is written in the RDESC.VLAN tag and in the
RDESC.STATUS.VP fields of the received descriptor.
If this bit is set for a queue, the DVMOLR.STRVLAN bit for this queue should
be set also.
STRVLAN 30 0b
VLAN Strip.
If this bit is set, the VLAN is removed from the packet, and can be inserted
in the receive descriptor (depending on the value of the Hide VLAN field).
Note: If this bit is set the DVMOLR[n].CRC strip bit should be set as the
CRC is not valid anymore.
CRC Strip 31 1b
CRC Strip.
If this bit is set, the CRC is removed from the packet.
Notes:
1. If the DVMOLR[n].STRVLAN bit is set the DVMOLR[n].CRC strip bit
should also be set as the CRC is not valid anymore.
2. Even when this bit is set, CRC strip is not done on runt packets
(smaller than 64 bytes).