Data Sheet

Programming Interface — Ethernet Controller I210

447

8.10.19 VLAN Filter Table Array - VFTA (0x5600 + 4*n [n=0...127]; R/W)

There is one register per 32 bits of the VLAN Filter Table. The size of the word array depends on the

number of bits implemented in the VLAN Filter Table. Software must mask to the desired bit on reads

and supply a 32-bit word on writes.

Note: All accesses to this table must be 32 bit.

The algorithm for VLAN filtering using the VFTA is identical to that used for the Multicast Table Array.

Refer to Section 8.10.15 for a block diagram of the algorithm. If VLANs are not used, there is no need

to initialize the VFTA.

8.10.20 Multiple Receive Queues Command Register - MRQC (0x5818; R/

Field Bit(s) Initial Value Description

Bit Vector 31:0 X Double-word wide bit vector specifying 32 bits in the VLAN Filter table.

Field Bit(s) Initial Value Description

Multiple

Receive

Queues

Enable

2:0 0x0

Multiple Receive Queues Enable.

Enables support for Multiple Receive Queues and defines the mechanism that controls

queue allocation.

000b = Multiple receive queues as defined by filters (2-tuple filters, L2 Ether-type

filters, SYN filter and flex filters).

001b = Reserved.

010b = Multiple receive queues as defined by filters and RSS for 4 queues

011b = Reserved.

100b = Reserved.

101b = Reserved.

110b = Reserved.

111b = Reserved.

Allowed values for this field are 000b, 010b. Any other value is ignored.