Data Sheet

Ethernet Controller I210 — Programming Interface
416
8.7.2 Firmware Semaphore - FWSM (0x5B54; RO to Host, RW to FW)
Field
1
Bit(s)
Initial
Value
Description
EEP_FW_Semaphore 0 0b
Software/Firmware Semaphore.
Firmware should set this bit to 1b before accessing the SW_FW_SYNC
register. If software is using the SWSM register and does not lock
SW_FW_SYNC, firmware is able to set this bit to 1b. Firmware should set
this bit back to 0b after modifying the SW_FW_SYNC register.
Note: If software takes ownership of the SWSM.SWESMBI bit for a
duration longer than 10 ms, firmware can take ownership of the
bit.
FW_Mode 3:1 0x0
Firmware Mode.
Indicates the firmware mode as follows:
000b = No manageability. Default mode for all SKUs.
001b = The I210 mode. A proxy code was loaded.
010b = PT mode. I210 SKUs only.
011b = Reserved.
100b = Host interface only. In the I210, this bit determines that a valid
firmware code is running from the Flash but PT mode is disabled.
Reserved 5:4 00b
Reserved.
Write 0x0, ignore on read.
EEP_Reload_Ind 6 0b
Flash Reloaded Indication.
Set to 1b after firmware reloads the Firmware related sections of the
Flash.
Cleared by firmware at Firmware reset only.
Reserved 14:7 0x0
Reserved
Write 0x0, ignore on read.
FW_Val_Bit 15 0b
Firmware Valid Bit.
Hardware clears this bit in reset de-assertion so software can know
firmware mode (bits 1-3) bits are invalid.
In the I210, firmware should set this bit to 1b when it is ready (end of boot
sequence).
Each time this bit is set to 1b, an ICR.MNG interrupt must be issued to
host.
Reset_Cnt 18:16 0b
Reset Counter.
Firmware increments the count on every firmware reset. After seven
firmware reset events, the counter remains at seven and does not wrap
around.