Data Sheet

Programming Interface — Ethernet Controller I210
405
8.4.39 Data - INVM_DATA (0x12120 + 4*n [n = 0..63]; R/W1)
These registers holds the iNVM memory content. The iNVM memory is organized in 32 lines of 64-bits
each. INVM_DATA[0] holds the lowest 32 bits of the first iNVM line. INVM_DATA[1] holds the highest
32 bits of the first iNVM line.
8.4.40 Lock - INVM_LOCK (0x12220 + 4*n [n = 0..31]; R/W1)
The iNVM memory is organized in 32 lines of 64-bits each. INVM_LOCK[n] controls iNVM memory line
n.
8.4.41 Test - INVM_TEST (0x122A0 + 4*n [n = 0..31]; R/W1)
The iNVM memory is organized in 32 lines of 64-bits each. INVM_TEST[n] is relative to memory line n.
The test bits are reserved for manufacturing tests. The chip may arrive with any value in these bits.
They have no impact on the chip behavior. User may use any test bit that was not already set to test
his iNVM write function.
8.4.42 Protect - INVM_PROTECT (0x12324; RW)
Note: Register bits reset after LAN_PWR_GOOD.
Field Bit(s) Init. Description
DATA 31:0 0x0
Data value programmed or to be programmed in the corresponding iNVM line segment
(high or low order 32-bits).
Once a bit that has been programmed to 1b, it cannot be re-programmed to 0b.
Field Bit(s) Init. Description
LOCK 0 0b
When set to 1b, the corresponding iNVM line is locked and cannot be programmed.
Once this bit that has been programmed to 1b, it cannot be re-programmed to 0b.
Reserved 31:1 0x0 Reserved.
Field Bit(s) Init. Description
ALLOW_WRITE (RO) 0 0b
When read as 1b, it indicates that the iNVM is enabled for writes.For example, the Code
field was written with the correct value, which enables writing the iNVM (0xABACADA).
WRITE_ERROR (RO) 1 0b
When read as 1b, it indicates an attempt to write the iNVM when the write was locked
(ALLOW_WRITE bit was 0b) or when the iNVM was still busy with a previous write.
This bit is cleared on the next iNVM write operation that was successfully performed.
BUSY (RO) 2 0b When read as 1b, it indicates that the iNVM is still busy with the previous write.
Reserved 3 0b Reserved.
CODE 31:4 0x0
When set to 0xABACADA, the iNVM is enabled for writes. Any other value set in this field
is protected against mistakenly writing the iNVM.
This field is always read as 0x0.