Data Sheet

Programming Interface — Ethernet Controller I210
395
8.4.8 Flash Opcode - FLASHOP (0x12054; R/W)
This register enables the host or the firmware to define the op-code used in order to erase a sector of
the flash or the complete flash. This register is reset only at power on or LAN_PWR_GOOD assertion.
This register is common to all ports and manageability. Register should be programmed according to
the parameters of the flash used.
Field Bit(s) Initial Value Description
FL_SCK 0 0b
Clock Input to the Flash
When FL_GNT is 1b, the FL_SCK out signal is mapped to this bit and provides the
serial clock input to the Flash device. Software clocks the Flash memory via toggling
this bit with successive writes.
FL_CE 1 1b
Chip Select Input to the Flash
When FL_GNT is 1b, the FL_CE output signal is mapped to the chip select of the Flash
device. Software enables the Flash by writing a 0b to this bit.
FL_SI 2 1b
Data Input to the Flash
When FL_GNT is 1b, the FL_SI output signal is mapped directly to this bit. Software
provides data input to the Flash via writes to this bit.
FL_SO 3 X
Data Output Bit from the Flash
The FL_SO input signal is mapped directly to this bit in the register and contains the
Flash memory serial data output. This bit is read only from the software perspective –
writes to this bit have no effect.
FL_REQ 4 0b
Request Flash Access
The software must write a 1b to this bit to get direct Flash memory access. It has
access when FL_GNT is 1b. When the software completes the access it must write a
0b.
FL_GNT 5 0b
Grant Flash Access
When this bit is 1b, the software can access the Flash memory using the FL_SCK,
FL_CE, FL_SI, and FL_SO bits.
FLA_add_size 6 0b
Flash Address Size
0b = Flash devices are accessed using 2 bytes of address.
1b = Flash devices (including 64 KB) are accessed using 3 bytes of the address.
Notes:
1. If this bit is set by one of the functions, it is also reflected in all other functions.
2. If value of BARCTRL.FLSize field is greater than 0x0, bit is read as 1b.
FLA_ABORT (RO) 7 0b
Flash Access Aborted
Bit is set by HW when Flash access was aborted due to deadlock avoidance. When bit
is set further Flash Bit Banging access from the function are blocked.
Note: Bit is cleared by write 1b to the FLA.FLA_CLR_ERR bit.
FLA_CLR_ERR (SC) 8 0b
Clear Flash Access Error
A write 1b to the FLA_CLR_ER bit clears the FLA.FLA_ABORT bit and enables further
Bit Banging access to the Flash from the function.
Reserved 28:9 0x0
Reserved
Write 0 ignore on read.
FL_BAR_WR (RO) 29 0b
Flash Write via BAR in Progress
This bit is set to 1b while a write to the Flash memory is in progress or is pending as
a result of a direct Memory access (not bit banging access). When this bit is clear
(read as 0b) software can initiate a byte write operation to the Flash device.
FL_BUSY (RO) 30 0b
Flash Busy
When set to 1b indicates that a Flash memory access is in progress.
FL_ER (SC) 31 0b
Flash Erase Command
When bit is set to 1b an erase command is sent to the Flash component only if the
EEC.FWE field is 00b (Flash Erase). This bit is automatically cleared when flash erase
has completed.