Data Sheet

Programming Interface — Ethernet Controller I210
389
Bit banging access to the flash via the FLA register is not protected by this field.
8.4.2 EEPROM-Mode Load Control/Status Register - EELOADCTL
(0x12020; RO to Host, RW to FW)
This register provides software EEPROM-mode load status.
All bits are RW to FW, RO to host - excepted to bit 12.
Bit banging access to the flash via the FLA register is not protected by this field.
Field Bit(s) Init. Description
Reserved 5:0 0x0 Reserved. Reads as 0b.
FLASH_IN_USE (RO) 6 0b
Valid when ee_pres = 1b.
When this bit is set to 1b, it indicates that the Flash is present with a valid signature
and the hardware was programmed from the Flash. The hardware will always first check
the existence of the external Flash.
0b = Flash is not used.
1b = Flash is used.
Reserved 7 0b
Reserved.
Ignore on read.
EE_PRES (RO) 8 1b
Valid when auto_rd=1. When this bit is set, it indicates that either a Flash is present
and has the correct signature field or the iNVM is no-empty, and the shadow RAM
contains the auto-load information from one of those sources (no need for software
programming).
Auto_RD (RO) 9 0b
Flash Auto-Read Done. When set to 1b, this bit indicates that the auto-read by
hardware from the Flash is done. This bit is also set when the Flash is not found or
when its signature field is not valid. This bit doesn't include MNG autoload status.
Reserved 10 0b Reserved.
EE_Size (RO) 14:11 0101b
Flash Size via EEPROM-Mode. This field defines the size of the NVM that is accessible via
EEPROM-mode. This is equal to the size of the internal shadow RAM, fixed to 4 KB. It is
encoded in power of 2 Kb units.
Reserved 18:15 0b Reserved.
FLASH_DETECTED
(RO)
19 0b RO; Flash responded as not busy to a read status and returned a manufacturer ID.
Reserved 22:20 0x0 Reserved. Reads as 0x0.
FLUPD 23 0b
Flash Update.
Writing 1b to this bit causes the content of the internal 4 KB shadow RAM to be written
into one of the first two 4 KB sectors of the Flash device (Sector 0 or Sector 1). The bit
is self-cleared immediately.
Reserved 24 0b Reserved. Reads as 0b.
SEC1VAL (RO) 25 0b
Sector 1 Valid. When set to 1b, indicates that the content of the 4 KB Sector 1 (from
byte address 0x1000 to 0x1FFF) of the Flash device is valid. When set to 0b, indicates
that the content of Sector 0 (from byte address 0x0000 to 0x0FFF) is valid.
Meaningful only when EE_PRES bit and FLASH_IN-USE bit are read as 1b.
FLUDONE (RO) 26 0b
Flash Update Done. When set to 1b, indicates that the Flash update process that was
initiated by setting FLUPD bit has completed.
Reserved 31:27 0x0 Reserved. Reads as 0x0.
Field Bit(s) Init. Description
ee-pcie-done_e (RO) 1 0 Indicates status of the NVM auto load section read following PCIe reset.
Reserved 2 1b
Reserved 7:5 0b Reserved.