Data Sheet

Programming Interface — Ethernet Controller I210
385
8.2.5 MDC/MDIO Configuration Register – MDICNFG (0x0E04; R/W)
Note: This register is used to configure the MDIO connection that is accessed via the MDIC register.
Refer to Section 3.7.2.2.2 for details on usage of this register.
MDI_IE 29 0b
Interrupt Enable
When set to 1b an Interrupt is generated at the end of an MDI cycle to
indicate an end of a read or write operation to the PHY.
MDI_ERR (RWM) 30 0b
Error
This bit is set to 1b by hardware when it fails to complete an MDI read.
Software should make sure this bit is clear (0b) before issuing an MDI read
or write command.
Note: This bit is valid only when the Ready bit is set.
Reserved 31 0b
Reserved.
Write 0b, ignore on read.
Field Bit(s) Initial Value Description
Reserved 20:0 0x0
Reserved.
Write 0b, ignore on read.
PHYADD
1
1. PHYADD is loaded from Initialization Control 4 Flash word to allocate the port address when using an external MDIO port.
25:21 0x00
External PHY Address
When the MDICNFG.Destination bit is 0b, default PHYADD accesses the
internal PHY.
Reserved 30:26 0x0
Reserved.
Write 0b, ignore on read.
Destination
2
2. Destination is loaded from Flash Initialization Control 3 word. When an external PHY supports a MDIO interface, this bit is set to
1b; otherwise, this bit is set to 0b.
31 0b
Destination
0b = MDIO transactions using the MDIC register are directed to the internal
PHY.
1b = MDIO transactions using the MDIC register are directed to an external
PHY using the MDC/MDIO protocol.
Note: When using the I2CCMD register to access an external PHY using
the I
2
C protocol, the Destination field must be set to 0b.
Field Bit(s) Initial Value Description