Data Sheet

Inline Functions—Ethernet Controller I210
349
• Run Time - During run time the SYSTIM timer value in the SYSTIMH, SYSTIML and SYSTIMR
registers, is updated periodically each 8 nS clock cycle according to the following formula:
— Define: INC_TIME = 8 nsec +/- TIMINCA.Incvalue * 2-32 nsec. Add or subtract the
TIMINCA.Incvalue is defined by TIMINCA.ISGN (while 0b means Add and 1b means Subtract)
— Then: SYSTIM = SYSTIM + INC_TIME
• Reading the SYSTIM register by software is done by the following sequence:
— Read the SYSTIMRregister
— Read the SYSTIMLregister
— Read the SYSTIMHregister
• Dynamic update of SYSTIM registers can be done by using the TIMADJ registers by the following
flow. It can also be done by adjusting the INC_TIME as described later in this section. Adjusting the
time by TIMADJ are meant to be used only when the time difference between the master and the
slave are small enough (at least smaller than one 8th of the time between consecutive SYNC
cycles). If this assumption is incorrect, than this process might take longer time than the SYNC
cycle to take effect. If this is an issue, software might need to set the SYSTIM by direct access as
described in the “Initial Setting” phase:
— Write the Tadjust value and its Sign to the TIMADJ register (the Sign bit indicates if the Tadjust
value should be added or subtracted)
— Following the write access to the TIMADJ register, the hardware repeats the following two steps
at each 8 nsec clock as long as the Tadjust > zero.
• SYSTIM = SYSTIM + INC_TIME +/- 1 nsec. Add or subtract 1 nsec is defined by
TIMADJ.Sign (while 0bmeans Add and 1b means Subtract)
• Tadjust = Tadjust - 1 nsec
• Note that the SYSTIM timer is incremented monotonically at all times. When updating the
SYSTIM by the TIMADJ and concurrent non-zero TIMINCA, the SYSTIM is incremented each
clock by steps in the range of 6.5ns up to 9.5ns units.
— As shown above, the time adjustment might take multiple clocks. Software might write a new
value to the TIMADJ register before the hardware completed the previous adjustment. In such
a case, the new value written by software, overrides the above equation. If such a race is not
desired, the software could check that the previous adjustment is completed by one of the
following methods:
• Wait enough time before accessing the TIMADJ register which guarantees that the previous
update procedure is completed.
• Poll the matched TSICR.TADJ flag which is set by the hardware each time the update
procedure is completed.
• Enable the TADJ interrupt by setting the TADJ flag in the TSIM register and enable timesync
interrupts by setting the Time_Sync flag in the IMS register. The TADJ interrupt indicates
that the hardware completed the adjustment procedure. This method is unlikely to be used
in nominal operation since the expected adjustments are in the sub s range.
• Dynamic update of SYSTIM registers can also be done by updating the INC_TIME. Using INC_TIME,
the time in the slave is updated in a more gradual manner and in most cases it results in a more
accurate timer. INC_TIME should be updated as a function of the required Tadjust and the time gap
between consecutive SYNC cycles that generated this Tadjust value. A possible equation for the
INC_TIME for the next SYNC cycle can be as follows:
INC_TIME (n+1) = INC_TIME (n) * (T4-T1)/(T3-T2) + Factor * (T4 - (T3 + Tdelay)) / Tcycle
while
— All time parameters are expressed in ns units
— INC_TIME = 8 +/- TIMINCA.Incvalue * 2-32 [ns]
— INC_TIME (n) and INC_TIME (n+1) are the INC_TIME used for the current Tcycle and the
calculated INC_TIME that should be used in the next Tcycle respectively
— Tcycle is the time between consecutive (Sync request + Delay request) cycles