Data Sheet

Inline Functions—Ethernet Controller I210
343
On the PCIe link existence of a TLP Process Hint (TPH) is indicated by setting the TH bit in the TLP
header. Using the PCIe TLP Steering Tag (ST) and Processing Hints (PH) fields, the I210 can provide
hints to the root complex about the destination (socket ID) and about data access patterns (locality in
Cache), when executing DMA memory writes or read operations. Supply of TLP Processing Hints
facilitates optimized processing of transactions that target Memory Space.
The I210 supports a steering table with 8 entries in the PCIe TPH capability structure (See
Section 9.5.3.4). The PCIe Steering table can be used by Software to provide Steering Tag information
to the Device via the TXCTL.CPUID and RXCTL.CPUID fields.
To enable TPH usage:
1. For a given function, the TPH Requester Enable bit in the PCIe configuration TPH Requester Control
Register should be set.
2. Appropriate TPH Enable bits in RXCTL or TXCTL registers should be set.
3. Processing hints should be programmed in the DCA_CTRL.Desc_PH and DCA_CTRL.Data_PH
Processing hints (PH) fields.
4. Steering information should be programed in the CPUID fields in the RXCTL and TXCTL registers.
The Processing Hints (PH) and Steering Tags (ST) are set according to the characteristics of the traffic
as described in Table 7-61.
Note: In order to enable TPH usage, all the memory reads are done without setting any of the byte
enable bits.
Note: Per queue, the DCA and TPH features are exclusive. Software can enable either the DCA
feature or the TPH feature for a given queue.
7.7.2.1 Steering Tag and Processing Hint Programming
Table 7-61 lists how the Steering tag (socket ID) and Processing hints are generated and how TPH
operation is enabled for different types of DMA traffic.
Table 7-61. Steering Tag and Processing Hint Programming
Traffic Type ST Programming PH Value Enable
Transmit descriptor write back or head
write back
TXCTL.CPUID
1
1. the driver should always set bits [7:3] to zero and place Socket ID in bits [2:0].
DCA_CTRL.Desc_PH
2
2. Default is 00b (Bidirectional data structure).
Tx Descriptor Writeback TPH EN field
in TXCTL.
Receive data buffers write RXCTL.CPUID
1
DCA_CTRL.Data_PH
3
3. Default is 10b (Target).
RX Header TPH EN or
Rx Payload TPH EN fields in RXCTL.
Receive descriptor writeback RXCTL.CPUID
1
DCA_CTRL.Desc_PH
2
RX Descriptor Writeback TPH EN
field in RXCTL.
Transmit descriptor fetch TXCTL.CPUID
4
4. the hints are always zero.
DCA_CTRL.Desc_PH
2
Tx Descriptor Fetch TPH EN
field in TXCTL.
Receive descriptor fetch RXCTL.CPUID
2
DCA_CTRL.Desc_PH
2
Rx Descriptor fetch TPH EN
field in RXCTL.
Transmit packet read TXCTL.CPUID
2
DCA_CTRL.Data_PH
3
Tx Packet TPH EN field in TXCTL.