Data Sheet

Inline Functions—Ethernet Controller I210
333
The timeout should be programmable by the driver, and the driver should be able to disable the timer
interrupt if it is not needed.
7.3.7.2 Description
A stand-alone down-counter is implemented. An interrupt is issued each time the value of the counter
is zero.
The software is responsible for setting initial value for the timer in the TCPTIMER.Duration field. Kick-
starting is done by writing a 1b to the TCPTIMER.KickStart bit.
Following the kick-start, an internal counter is set to the value defined by the TCPTIMER.Duration field.
Then during the count operation, the counter is decreased by one each millisecond. When the counter
reaches zero, an interrupt is issued (see EICR register Section 8.8.3). The counter re-starts counting
from its initial value if the TCPTIMER.Loop field is set.
7.3.8 Setting Interrupt Registers
In each mode, the registers controlling the interrupts should be set in a different way to assure the
right behavior.
7.4 802.1Q VLAN Support
The I210 provides several specific mechanisms to support 802.1Q VLANs:
• Optional adding (for transmits) and stripping (for receives) of IEEE 802.1Q VLAN tags.
• Optional ability to filter packets belonging to certain 802.1Q VLANs.
• Double VLAN Support.
Table 7-53. Registers Settings for Different Interrupt Modes
Field Description
INT-x/MSI +
Legacy
INT-x/ MSI +
Extend
MSI-X
Multi vector
MSI-X
Single
vector
IMS Legacy Masks Set
1
1. According to the requested causes
Set
2
2. Only non traffic causes.
Set
2
Set
2
IAM Legacy Auto Mask Register Might be set 0x0 0x0 0x0
EIMS Extended Masks
Set Other
Cause only.
Set
1
Set
1
Set
1
EIAC Extended Auto Clear register 0x0 0x0
At least one
3
3. EIAC or EIAM or both should be set for each cause.
0x0
EIAM Extended Auto Mask Register 0x0 Set
1
Set
1
EITR[0] Interrupt Moderation register
Might be
enabled
Might be
enabled
Enable
4
4. EITR must be enabled if Auto Mask is disabled. If Auto Mask is enabled, moderation might be disabled for the specific vector.
Enable
EITR[1...n] Extended Interrupt Moderation register Disable Disable Enable
4
Disable
GPIE Interrupts configuration See Tab le 7- 52 for details