Data Sheet

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Ethernet Controller I210 —Pin Interface

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2.4 Strapping Options

Note: nvm_aux_pwr_en and nvm_alt_aux_pwr_en bits are read as 0b from NVM, AUX_PWR mode

is enabled.

Table 2-11. Strapping Options

Pad NVM PU

0x1E.15

0x29.10

0x29.13

0x29.15

Internal

PU

Function Latch Event

DEV_OFF_N

SDP3

NVM_SK

NVM_SI

SDP1 [PCIe_DIS]

Device Off Enable

nvm_aux_pwr_en

nvm_alt_aux_pwr_en

en_pin_pcie_func_dis

Comments

DEV_OFF_N N/A 0XXXX1XXX

Device off mode when the pin is

pulled low.

AUX_PWR (option 1)N/A 1XXXX01XX

AUX power mode when the pin is

pulled high.

AUX_PWR (option 2)N/A X1XXX001X

AUX power mode when the pin is

pulled high.

SECURITY_EN LAN_PWR_GOODXXX1XXXXX

PU (until

LPG)

Flash security is disabled when the

pin is pulled low.

PCIE_DIS_N N/A XXXX0XXX1

Active low, valid on Flash load

complete. Strap logic that requires a

dedicated SDP.