Data Sheet
Ethernet Controller I210 —Inline Functions
290
RS: Signals the hardware to report the status information. This is used by software that does in-
memory checks of the transmit descriptors to determine which ones are done. For example, if software
queues up 10 packets to transmit, it can set the RS bit in the last descriptor of the last packet. If
software maintains a list of descriptors with the RS bit set, it can look at them to determine if all
packets up to (and including) the one with the RS bit set have been buffered in the output FIFO.
Looking at the status byte and checking the Descriptor Done (DD) bit enables this operation. If DD is
set, the descriptor has been processed. Refer to Table 7-27 for the layout of the status field.
IC: If set, requests hardware to add the checksum of the data from CSS to the end of the packet at the
offset indicated by the CSO field.
IFCS: When set, hardware appends the MAC FCS at the end of the packet. When cleared, software
should calculate the FCS for proper CRC check. There are several cases in which software must set
IFCS:
• Transmitting a short packet while padding is enabled by the TCTL.PSP bit.
• Checksum offload is enabled by the IC bit in the TDESC.CMD.
• VLAN header insertion enabled by the VLE bit in the TDESC.CMD.
EOP: When set, indicates this is the last descriptor making up the packet. Note that more than one
descriptor can be used to form a packet.
Note: VLE, IFCS, CSO, and IC must be set correctly only in the first descriptor of each packet. In
previous silicon generations, some of these bits were required to be set in the last descriptor
of a packet.
7.2.2.1.5 Status – STA
7.2.2.1.6 DD (Bit 0) - Descriptor Done Status
The DD bit provides the transmit status, when RS is set in the command: DD indicates that the
descriptor is done and is written back after the descriptor has been processed.
Note: When head write back is enabled (TDWBAL[n].Head_WB_En = 1), there is no write-back of
the DD bit to the descriptor. When using legacy Tx descriptors, Head writeback should not be
enabled (TDWBAL[n].Head_WB_En = 0).
7.2.2.1.7 VLAN
The VLAN field is used to provide the 802.1Q/802.1ac tagging information. The VLAN field is valid only
on the first descriptor of each packet when the VLE bit is set. The rule for VLAN tag is to use network
ordering. The VLAN field is placed in the transmit descriptor in the following manner:
Table 7-27. Transmit Status (TDESC.STA) Layout
321 0
Reserved DD
Table 7-28. VLAN Field (TDESC.VLAN) Layout
15 13 12 11 0
PRI CFI VLAN ID