Data Sheet

Pin Interface—Ethernet Controller I210
27
MDI_PLUS[1]/
SFP_I2C_CLK
55 A Bi-dir
In BASE-T:
Media Dependent Interface[1]:
1000BASE-T:
In MDI configuration, MDI[1]+ corresponds to BI_DB+ and in MDI-X
configuration MDI[1]+ corresponds to BI_DA+.
100BASE-TX:
In MDI configuration, MDI[1]+ is used for the receive pair and in MDI-X
configuration MDI[1]+ is used for the transmit pair.
10BASE-T:
In MDI configuration, MDI[1]+ is used for the receive pair and in MDI-X
configuration MDI[1]+ is used for the transmit pair.
In SerDes:
SFP 2 wire interface clock – connects to Mod-Def1 input of SFP (O/D). Can also
be used as MDC pin (Out).
MDI_MINUS[1]/
SRDS_SIG_DET
54 A Bi-dir
In BASE-T:
Media Dependent Interface[1]:
1000BASE-T:
In MDI configuration, MDI[1]- corresponds to BI_DB- and in MDI-X
configuration MDI[1]- corresponds to BI_DA-.
100BASE-TX:
In MDI configuration, MDI[1]- is used for the receive pair and in MDI-X
configuration MDI[1]- is used for the transmit pair.
10BASE-T:
In MDI configuration, MDI[1]- is used for the receive pair and in MDI-X
configuration MDI[1]- is used for the transmit pair.
In SerDes:
Signal Detect: Indicates that signal (light) is detected from the fiber. High for
signal detect, low otherwise.
Polarity of Signal Detect pin is controlled by the CTRL.ILOS bit.
For non-fiber SerDes applications, link indication is internal,
CONNSW.ENRGSRC bit should be 0b and pin should be connected to a pull-up
resistor.
MDI_PLUS[2]
MDI_MINUS[2]/SET_N
MDI_PLUS[3]/SER_P
MDI_MINUS[3]/SER_N
53
52
50
49
ABi-dir
In BASE-T:
Media Dependent Interface[3:2]:
1000BASE-T:
In MDI and in MDI-X configuration, MDI[2]+/- corresponds to BI_DC+/- and
MDI[3]+/- corresponds to BI_DD+/-.
100BASE-TX: Unused.
10BASE-T: Unused.
In SerDes
SerDes/SGMII Serial Data input/output: Differential SERDES Receive/Transmit
interface.
A serial differential input/output pair running at 1.25Gb/s.
An embedded clock present in this input is recovered along with the data.
This output carries both data and an embedded 1.25 GHz clock that is
recovered along with data at the receiving end.
XTAL1
XTAL2
46
45
A-In
A-Out
Input/
Output
XTAL In/Out
These pins can be driven by an external 25 MHz crystal or driven by an external
MOS level 25 MHz oscillator. Used to drive the PHY.
RSET 48 A Bias
PHY Termination
This pin should be connected through a 4.99 K ±1% resister to ground.
Table 2-7. PHY Pins
Symbol Lead # Type
Op
Mode
Name and Function