Data Sheet

Ethernet Controller I210 —Flash Map
212
6.7.2.6 LAN IPv4 Address 3; (MIPAF15) — Offset 0x07-0x08
Same structure as LAN IPv4 Address 0.
These values are stored in the MIPAF[15] register (0x58EC). Refer to Section 8.22.9 for a description of
this register.
Note: This value is ignored if Enable ARP Response in LRXEN1 is set (Section 6.7.2.18).
6.7.2.7 LAN Ethernet MAC Address 0 LSB (MMAL0) — Offset 0x09
This word is loaded by firmware to the 16 LS bits of the MMAL[0] register. Refer to Section 8.22.10 for
a description of the register.
6.7.2.8 LAN Ethernet MAC Address 0 MID; (MMAL0) — Offset 0x0A
This word is loaded by firmware to the 16 MS bits of the MMAL[0] register.
6.7.2.9 LAN Ethernet MAC Address 0 MSB; (MMAH0) — Offset 0x0B
This word is loaded by firmware to the MMAH[0] register.
6.7.2.10 LAN Ethernet MAC Address 1; (MMAL/H1) — Offset 0x0C-0x0E
Same structure as LAN Ethernet MAC Address 0. Loaded to MMAL[1] and MMAH[1] registers.
6.7.2.11 LAN Ethernet MAC Address 2; (MMAL/H2) — Offset 0x0F-0x11
Same structure as LAN Ethernet MAC Address 0. Loaded to MMAL[2] and MMAH[2] registers.
6.7.2.12 LAN Ethernet MAC Address 3; (MMAL/H3) — Offset 0x12-0x14
Same structure as LAN Ethernet MAC Address 0. Loaded to MMAL[3] and MMAH[3] registers.
Bits Name
Default
HW Mode
Description
Reserved
15:8 LAN Ethernet MAC Address 0, Byte 1.
7:0 LAN Ethernet MAC Address 0, Byte 0.
Bits Name
Default
HW Mode
Description Reserved
15:8 LAN Ethernet MAC Address 0, Byte 3.
7:0 LAN Ethernet MAC Address 0, Byte 2.
Bits Name
Default
HW Mode
Description Reserved
15:8 LAN Ethernet MAC Address 0, Byte 5.
7:0 LAN Ethernet MAC Address 0, Byte 4.