Data Sheet

Flash Map—Ethernet Controller I210
211
6.7.2.1 Section Header — Offset 0x0
6.7.2.2 LAN IPv4 Address 0 LSB; (MIPAF12 LSB) — Offset 0x01
This value is stored in the MIPAF[12] register (0x58E0). Refer to Section 8.22.9 for a description of this
register.
6.7.2.3 LAN IPv4 Address 0 MSB; (MIPAF12 MSB) — Offset 0x02
This value is stored in the MIPAF[12] register (0x58E0). Refer to Section 8.22.9 for a description of this
register.
6.7.2.4 LAN IPv4 Address 1; (MIPAF13) — Offset 0x03-0x04
Same structure as LAN IPv4 Address 0.
These values are stored in the MIPAF[13] register (0x58E4). Refer to Section 8.22.9 for a description of
this register.
6.7.2.5 LAN IPv4 Address 2; (MIPAF14) — Offset 0x05-0x06
Same structure as LAN IPv4 Address 0.
These values are stored in the MIPAF[14] register (0x58E8). Refer to Section 8.22.9 for a description of
this register.
Bits Name
Default
HW Mode
Description Reserved
15:8 Block CRC8
CRC8 is computed over the module, header included (for example,
starting from word offset 0x0 included) where CRC8 field was
zeroed before the computing.
7:0 Block Length
Block Length in Words
In the initial image the size of this section must be zero, but
enough space should be left to enable all filters to be set up (up to
offset 0x84). Firmware ignores bigger sizes than that to avoid
buffer overflow in case the software writes a value that is out of
bounds.
Bits Name
Default
HW Mode
Description Reserved
15:8
LAN IPv4 Address 0 Byte
1
LAN IPv4 Address 0, Byte 1.
7:0
LAN IPv4 Address 0 Byte
0
LAN IPv4 Address 0, Byte 0.
Bits Name
Default
HW Mode
Description Reserved
15:8
LAN IPv4 Address 0 Byte
3
LAN IPv4 Address 0, Byte 3.
7:0
LAN IPv4 Address 0 Byte
2
LAN IPv4 Address 0, Byte 2.