Data Sheet

Ethernet Controller I210 —Introduction
20
10
After the entire packet is placed into the Rx FIFO, the receive DMA posts the packet data to the location indicated
by the descriptor through the PCIe interface. If the packet size is greater than the buffer size, more descriptors are
fetched and their buffers are used for the received packet.
11
When the packet is placed into host memory, the receive DMA updates all the descriptor(s) that were used by
packet data.
12
After enough descriptors are gathered for write back or the interrupt moderation timer expires or the packet
requires immediate forwarding, the receive DMA writes back the descriptor content along with status bits that
indicate the packet information including what off loads were done on that packet.
13
After the interrupt moderation timer completes or an immediate packet is received, the I210 initiates an interrupt
to the host to indicate that a new received packet is already in host memory.
14
Host reads the packet data and sends it to the TCP/IP stack for further processing. The host releases the
associated buffers and descriptors once they are no longer in use.
Table 1-12. Receive Data Flow (Continued)
Step Description