Data Sheet

Power Management—Ethernet Controller I210
185
5.10.2 Latency Tolerance Reporting
The PCIe function can request to generate a minimum value LTR, a maximum value LTR, and a LTR
message with the requirement bits cleared. The I210 incorporates latency requirements from the
function, provided it has LTR messaging enabled and sends a single LTR message in the following
manner:
• The acceptable latency values for the message sent upstream by the I210 must reflect the lowest
latency tolerance values associated with the function.
— If the function has no Latency requirement for a certain type of traffic (snoop/non-snoop), the
message sent by the I210 does not have the requirement bit corresponding to that type of
traffic set.
• The I210 transmits a new LTR message upstream when the capability is enabled and when the
function changes the values it has reported internally in such a way as to change the incorporated
value reported previously by the I210.
The PCIe function in the I210 reports support of LTR messaging in the configuration space by:
• Setting the LTR Mechanism Supported bit in the PCIe Device Capabilities 2 configuration register
(support defined by LTR_EN bit in Initialization Control Word 1 Flash word, that controls enabling of
the LTR structures).
• Supporting the LTR capability structure in the PCIe configuration space.
To enable generating LTR messages, the LTR Mechanism Enable bit in the Device Control 2
configuration register of function 0 should be set.
Note: If the function does not have LTR messaging enabled, it is considered a function that does not
have any latency tolerance requirements.
5.10.2.1 Conditions for Generating LTR Message with the Requirement Bits
Cleared
When LTR messaging is enabled, the I210’s function sends a LTR message with the requirement bits
cleared in the following cases:
1. Following PE_RST_N assertion (PCIe reset) after LTR capability is enabled.
2. LAN port is disabled (both RCTL.RXEN and TCTL.EN are cleared), receive buffer is empty and
LTRC.PDLS_EN is set.
3. LAN port is disconnected, BMC to Host traffic is disabled (MANC.EN_BMC2HOST = 0) and
LTRC.LNKDLS_EN is set.
4. Function is not in D0a state.
5. When the LSNP and LNSNP bits are cleared in the LTRMINV register and minimum LTR value needs
to be sent.
6. When the LSNP and LNSNP bits are cleared in the LTRMAXV register and maximum LTR value needs
to be sent.
7. When the LTR Mechanism Enable bit in the Device Control 2 configuration register of function 0 was
cleared and the I210 sent previously a LTR message with requirement bits set.
When one of the previous conditions exist in the function that is enabled, the I210 sends a LTR
message with the requirement bits cleared.
Note: If the PCIe function is disabled, it does not generate latency tolerance requirements.