Data Sheet

Power Management—Ethernet Controller I210
175
13. Release management Host interface semaphore (SW_FW_SYNC.SW_MNG_SM register bit) using
the flow defined in Section 4.6.2.
14. Verify that a firmware reset was not initiated during the proxying configuration process by reading
the FWSTS.FWRI firmware reset indication bit. If a firmware reset was initiated. Return to step 1.
15. Set WUC.PPROXYE bit to 1b and enable entry into D3 low power state.
16. Once the I210 moves back into D0 state, the software device driver needs to clear the
WUC.PPROXYE bit, PROXYS, and PROXYFC registers until the next time the system moves to a low
power state with proxying enabled.
Normally, after enabling wake-up or proxying, system software moves the device to D3 low power state
by writing a 11b to the PCI PMCSR.Power State field.
Once proxying is enabled by setting the WUC.PPROXYE bit to 1b and device is placed in the D3 low
power state, the I210 monitors incoming packets, first filtering them according to its standard address
filtering method, then filtering them with all of the proxying filters enabled in the PROXYFC register. If a
packet passes both the standard address filtering and at least one of the enabled proxying filters and
does not pass any of the enabled wake-up filters, the I210:
1. Executes the relevant protocol offload for the packet and not forward the packet to the host.
2. Set one or more bits in the Proxying Status (PROXYS) register according to the proxying filters
matched.
Note: The I210 sets more than one bit in the PROXYS register if a packet matches more than one
filter.
3. Wakes the system and forwards a packet that matches the proxying filters but can’t be supported
by the host for further processing if configured to do so by the software device driver via the Set
Firmware Proxying Configuration command using the shared RAM interface (See
Section 10.8.2.4.2.2).
Notes:
1. When the device is in D3, a packet that matches both one of the enabled proxying filters as defined
in the PROXYFC register and one of the enabled wake-up filters as defined in the WUFC register
only wakes up the system and protocol offload (proxying) does not occur.
2. Protocol offload is not executed for illegal packets with CRC errors or checksum errors and the
packets are silently discarded.
3. Once a packet that meets the criteria for proxying is received, the I210 should respond to the
request after less than 60 Seconds.
5.7.2 Protocol Offload Activation in D0
To enable protocol offload in D0,the software device driver should implement the following steps:
1. Read MANC.MPROXYE bit to verify that proxying is supported by management.
2. Clear all pending proxy status bits in the Proxying Status (PROXYS) register.
3. Program the Proxying Filter Control (PROXYFC) register to indicate the type of packets that should
be forwarded to manageability for proxying and then program the necessary data to the IPv4/v6
Address Table (IP4AT, IP6AT) and the Flexible Host Filter Table (FHFT) registers.
4. Take ownership of the management host interface semaphore (SW_FW_SYNC.SW_MNG_SM
register bit) using the flow defined in Section 4.6.1 to send protocol offload information to
firmware.
5. Verify that the HICR.En bit is set 1b, which indicates that the shared RAM interface is available.
6. Read and clear the FWSTS.FWRI firmware reset indication bit.