Data Sheet

Introduction—Ethernet Controller I210

1.7.1.2 OBFF

The I210 support Optimized Buffer Flush Fill (OBFF) for synchronizing platform I/Os and optimizing CPU

sleep states. The support is via the PE_WAKE_N pin only.

1.7.2 Audio and Video Bridging Support

See Section 1.3.1 for details on IEEE 802.1Qav support.

1.7.2.1 Tx Timestamp

The I210 supports three types of transmit timestamps:

1. Reporting back of the timestamp in the transmit descriptor.

2. Inserting the timestamp in the packet sent.

3. Recording the timestamp of selected packet in a register (legacy behavior).

Transmit timestamp is described in Section 7.0, Inline Functions.

1.7.3 Virtualization

SR-IOV and VMDq is not supported in hardware by the I210. The I210 can still be used in virtualized

systems where the VM switching is done in software.

1.7.3.1 Number of Exact Match Filters

The number of RAH/RAL registers is 16.

1.7.4 Host Interface

1.7.4.1 MSI-X Support

The number of MSI-X vectors supported by the I210 changed to 5. For further information, refer to

Section 7.3.

1.7.4.2 Optimized Buffer Flush/FILL (OBFF)

The I210 supports the PCIe OBFF specification, using the PE_WAKE_N signal to enable synchronizing

device activity and optimize power management of memory, CPU and RC internal circuitry. By

synchronizing PCIe activity of PCIe endpoints, the system can stay in lower power states for a longer

duration.

When in buffer fill (DMA coalescing) operating mode, the PCIe link is optionally placed in a L1 power

saving state and DMA activity is placed on hold. The I210 moves into buffer flush mode when internal

receive buffers pass a pre-determined threshold value, a watchdog timer expires, or the PCIe interface

invokes a move out of buffer fill state. Further information can be found in Section 5.9.