Data Sheet

Ethernet Controller I210 —Power Management
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In the event of a PCIe Master disable (Configuration Command register.BME set to 0b) or LAN port
disabled or if the function is moved into D3 state during a DMA access, the I210 generates an internal
reset to the function and stops all DMA accesses and interrupts. Following a move to normal operating
mode, the software device driver should re-initialize the receive and transmit queues of the relevant
port.
Notes: The software device driver sets the GIO Master Disable bit when notified of a pending master
disable (or D3 entry). the I210 then blocks new requests and proceeds to issue any pending
requests by this function. The software device driver then polls the GIO Master Enable Status
bit. Once the bit is cleared, it is guaranteed that no requests are pending from this function.
The software device driver might time out if the GIO Master Enable Status bit is not cleared
within a given time.
The GIO Master Disable bit must be cleared to enable a master request to the PCIe link. This
can be done either through reset or by the software device driver.
5.2.4 Dr State (D3cold)
Transition to Dr state is initiated on several occasions:
On system power up - Dr state begins with the assertion of the internal power detection circuit and
ends with de-assertion of PE_RST_N.
On transition from a D0a state - During operation the system might assert PE_RST_N at any time.
In an ACPI system, a system transition to the G2/S5 state causes a transition from D0a to Dr state.
On transition from a D3 state - The system transitions the I210 into the Dr state by asserting PCIe
PE_RST_N.
Any wake-up filter settings or proxying filter settings that were enabled before entering this reset state
are maintained.
The system might maintain PE_RST_N asserted for an arbitrary time. The de-assertion (rising edge) of
PE_RST_N causes a transition to D0u state.
While in Dr state, the I210 might enter one of several modes with different levels of functionality and
power consumption. The lower-power modes are achieved when the I210 is not required to maintain
any functionality (see Section 5.2.4.1).
5.2.4.1 Dr Disable Mode
The I210 enters a Dr disable mode on transition to D3cold state when it does not need to maintain any
functionality. The conditions to enter either state are:
The I210 is in Dr state
APM WoL (Wake-on-LAN) is inactive
Proxying is not required (WUC.PPROXYE is cleared to 0b).
Pass-through manageability is disabled
ACPI PME is disabled
•The PHY Power Down Enable Flash bit is set (word 0xF, bit 6).
Entering Dr disable mode is usually done by asserting PCIe PE_RST_N. It might also be possible to
enter Dr disable mode by reading the Flash while already in Dr state. The usage model for this later
case is on system power up, assuming that manageability, wake up and proxying are not required.