Data Sheet

Initialization—Ethernet Controller I210
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4.5.9.1 Initialize the Receive Control Register
To properly receive packets the receiver should be enabled by setting RCTL.RXEN. This should be done
only after all other setup is accomplished. If software uses the Receive Descriptor Minimum Threshold
Interrupt, that value should be set.
4.5.9.2 Dynamic Enabling and Disabling of Receive Queues
Receive queues can be dynamically enabled or disabled given the following procedure is followed:
Enabling a queue:
• Follow the per queue initialization sequence described in Section 4.5.9.
Note: If there are still packets in the packet buffer assigned to this queue according to previous
settings, they are received after the queue is re-enabled. In order to avoid this condition, the
software might poll the PBWAC register. Once a an empty condition of the relevant packet
buffer is detected or two wrap around occurrences are detected the queue can be re-enabled.
Disabling a Queue:
1. Disable the packet assignments to this queue.
2. Poll the PBWAC register until an empty condition of the relevant packet buffer is detected or two
wrap around occurrences are detected.
3. Disable the queue by clearing RXDCTL.ENABLE. The I210 stops fetching and writing back
descriptors from this queue immediately. The I210 eventually completes the storage of one buffer
allocated to this queue. Any further packet directed to this queue is dropped. If the currently
processed packet is spread over more than one buffer, all subsequent buffers are not written.
4. The I210 clears RXDCTL.ENABLE only after all pending memory accesses to the descriptor ring or to
the buffers are done. The software device driver should poll this bit before releasing the memory
allocated to this queue.
Note: The Rx path can be disabled only after all Rx queues are disabled.
4.5.10 Transmit Initialization
• Program the TCTL register according to the MAC behavior needed.
• Program the TXPBSIZE register so any transmit buffer that is in use is at least greater to twice the
maximum packet size that might be stored in it. In addition, comply to the setting rules defined in
Section 4.5.9.
If operation in half duplex mode is expected, program the TCTL_EXT.COLD field. For internal PHY mode
the default value of 0x42 is acceptable. For SGMII mode, a value reflecting the I210 and the PHY SGMII
delays should be used. A suggested value for a typical PHY is 0x46 for 10 Mbps and 0x4C for 100 Mb/s.
The following should be done once per transmit queue:
• Allocate a region of memory for the transmit descriptor list.
• Program the descriptor base address with the address of the region.
• Set the length register to the size of the descriptor ring.
• Program the TXDCTL register with the desired Tx descriptor write back policy. Suggested values
are:
— WTHRESH = 1b
— All other fields 0b.