Data Sheet

Initialization—Ethernet Controller I210
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4.5.3 Initialization Sequence
The following sequence of commands is typically issued to the device by the software device driver in
order to initialize the I210 to normal operation. The major initialization steps are:
• Disable Interrupts - see Interrupts during initialization.
• Issue Global Reset and perform General Configuration - see Global Reset and General
Configuration.
• Setup the PHY and the link - see Link Setup Mechanisms and Control/Status Bit Summary.
• Initialize all statistical counters - refer to Section 4.5.8.
• Initialize Receive - refer to Section 4.5.9.
• Initialize Transmit - refer to Section 4.5.10.
• Enable Interrupts - refer to Section 4.5.4.
4.5.4 Interrupts During Initialization
• Most drivers disable interrupts during initialization to prevent re-entering the interrupt routine.
Interrupts are disabled by writing to the Extended Interrupt Mask Clear (EIMC) register. Note that
the interrupts need to be disabled also after issuing a global reset, so a typical driver initialization
flow is:
• Disable interrupts
• Issue a Global Reset
• Disable interrupts (again)
•…
After initialization completes, a typical software device driver enables the desired interrupts by writing
to the Extended Interrupt Mask Set (EIMS) register.
4.5.5 Global Reset and General Configuration
Device initialization typically starts with a global reset that places the device into a known state and
enables the software device driver to continue the initialization sequence.
Several values in the Device Control (CTRL) register need to be set, upon power up, or after a device
reset for normal operation.
•The FD bit should be set per interface negotiation (if done in software), or is set by the hardware if
the interface is auto-negotiating. This is reflected in the Device Status Register in the auto-
negotiation case.
• Speed is determined via auto-negotiation by the PHY, auto-negotiation by the PCS layer in SGMII/
SerDes mode, or forced by software if the link is forced. Status information for speed is also
readable in the STATUS register.
•The ILOS bit should normally be set to 0b.
4.5.6 Flow Control Setup
If flow control is enabled, program the FCRTL0, FCRTH0, FCTTV and FCRTV registers. In order to avoid
packet losses, FCRTH should be set to a value equal to at least two maximum size packets below the
receive buffer size (assuming a packet buffer size of 36 KB and the expected maximum size packet of
9.5 KB), the FCRTH0 value should be set to 36 - 2 * 9.5 = 17KB.For example, FCRTH0.RTH should be
set to 0x440.