Data Sheet

Initialization—Ethernet Controller I210
143
4.4 Device and Function Disable
4.4.1 General
For a LAN on Motherboard (LOM) design, it might be desirable for the system to provide BIOS-setup
capability for selectively enabling or disabling LAN functions. It enables the end-user more control over
system resource-management and avoid conflicts with add-in NIC solutions. The I210 provides support
for selectively enabling or disabling one or more LAN device(s) in the system.
Device presence (or non-presence) must be established early during BIOS execution, in order to ensure
that BIOS resource-allocation (of interrupts, of memory or I/O regions) is done according to devices
that are present only. This is frequently accomplished using a BIOS Configuration Values Driven on
Reset (CVDR) mechanism. The I210 LAN-disable mechanism is implemented in order to be compatible
with such a solution.
4.4.2 Disabling Both LAN Port and PCIe Function (Device Off)
The I210 provides a mechanism to disable its LAN port and the PCIe function. When DEV_OFF_N is
asserted (driven low) and the Device Off Enable Flash bit (in word 0x1E) is set to 1b (refer to
Section 6.2.19).
For a LOM design, it might be desirable for the system to provide BIOS-setup capability for selectively
enabling or disabling LOM devices. This might allow the end-user more control over system resource-
management; avoid conflicts with add-in NIC solutions, etc. The I210 provides support for selectively
enabling or disabling it.
While in device disable mode, the PCIe link is in L3 state. The PHY is in power down mode. Output
buffers are tri-stated.
Asserting or deasserting PCIe PE_RST_N does not have any affect while the device is in device disable
mode (the device stays in the respective mode as long as the right settings on DEV_OFF_N). However,
the device might momentarily exit the device disable mode from the time PCIe PE_RST_N is de-
asserted again and until the Flash is read.
During power-up, the input pin DEV_OFF_N is ignored until the Flash is read. From that point, the
device might enter device disable according to the Flash settings.
4.4.3 Disabling PCIe Function Only
The I210 also supports disabling just the PCIe function but keeping the LAN port that resides on it fully
active (for manageability purposes and BMC pass-through traffic). This functionality can be achieved by
driving SDP1 pin low and setting Flash en_pin_pcie_func_dis bit (word 0x29) to 1b.
Note: In this case when only the PCIe function is disabled, if the PHPM.LPLU register bit is set to 1b,
the internal copper PHY attempts to create a link with its link partner at the lowest common
link speed via Auto-negotiation.