Data Sheet

Initialization—Ethernet Controller I210
141
The shadow copies of these bits in the Wakeup Control register are treated identically.
8. Refers to bits in the Wake Up Control register that are not part of the Wake-Up Context (the
PME_En and PME_Status bits).
9. The Wake Up Status registers include the following:
a. Wake Up Status register
b. Wake Up Packet Length.
c. Wake Up Packet Memory.
10. The Manageability Control registers refer to the following registers:
a. MANC 0x5820
b. MFUTP0-15 0x5030 - 0x504C
c. MNGONLY 0x5864
d. MAVTV0-7 0x5010 - 0x502C
e. MDEF0-7 0x5890 - 0x58AC
f. MDEF_EXT 0x5930 - 0x594C
g. METF0-3 0x5060 - 0x506C
h. MIPAF0-15 0x58B0 - 0x58EC
i. MMAH/MMAL0-1 0x5910 - 0x591C
j. FWSM
11. The Wake-up Management registers include the following:
a. Wake Up Filter Control
b. IP Address Valid
c. IPv4 Address Table
d. IPv6 Address Table
e. Flexible Filter Length Table
f. Flexible Filter Mask Table
12. The other configuration registers include:
a. General Registers
b. Interrupt Registers
c. Receive Registers
d. Transmit Registers
e. Statistics Registers
f. Diagnostic Registers
Of these registers, MTA[n], VFTA[n], WUPM[n], FTFT[n], FHFT[n], FHFT_EXT[n], TDBAH/TDBAL, and
RDBAH/RDVAL registers have no default value. If the functions associated with the registers are
enabled, they must be programmed by software. Once programmed, their value is preserved through
all resets as long as power is applied to the I210.
Note: In situations where the device is reset using the software reset CTRL.RST or CTRL.DEV_RST,
the transmit data lines are forced to all zeros. This causes a substantial number of symbol
errors detected by the link partner. In TBI mode, if the duration is long enough, the link
partner might restart the auto-negotiation process by sending break-link (/C/ codes with the
configuration register value set to all zeros).
13. The contents of the following memories are cleared to support the requirements of PCIe FLR: