Data Sheet

Ethernet Controller I210 —Initialization
138
•Set the SWSM.SWESMBI bit.
•Read SWSM.
•If SWSM.SWESMBI was successfully set (semaphore was acquired); otherwise, go back to
step a.
• Clear the bit in SW_FW_SYNC that control the software ownership of the resource to
indicate this resource is free.
• Release ownership of the software/firmware semaphore by clearing the SWSM.SWESMBI
bit.
7. Wait for the CFG_DONE bit (EEMNGCTL.CFG_DONE0).
8. Take ownership of the relevant PHY using the following flow:
a. Get ownership of the software/firmware semaphore SWSM.SWESMBI (offset 0x5B50 bit 1):
•Set the SWSM.SWESMBI bit.
•Read SWSM.
•If SWSM.SWESMBI was successfully set (semaphore was acquired); otherwise, go back to
step a.
• This step assures that the internal firmware does not access the shared resources register
(SW_FW_SYNC).
b. Software reads the Software-Firmware Synchronization Register (SW_FW_SYNC) and checks the
bit that controls the PHY it wants to own.
• If the bit is set (firmware owns the PHY), software tries again later.
c. Release ownership of the software/firmware semaphore by clearing SWSM.SWESMBI bit.
9. Configure the PHY.
10. Release ownership of the relevant PHY using the flow described in Section 4.6.2.
Note: Software PHY ownership should not exceed 100 ms. If software takes PHY ownership for a
longer duration, firmware might implement a timeout mechanism and take ownership of the
PHY.
4.3.2 Registers and Logic Reset Affects
The resets affect the following registers and logic:
Table 4-2. I210 Reset Affects - Common Resets
Reset Activation LAN_PWR_GOOD
PE_
RST_N
In-Band PCIe Reset
FW
Reset
Notes
LTSSM (PCIe Back to Detect/
Polling)
XXX
PCIe Link Data Path X X X
Read Flash 16.
Read Flash (Complete Load) X X X
PCI Configuration Registers -
Non Sticky
XXX 3.
PCI Configuration Registers -
Sticky
XXX 4.
PCIe Local Registers X X X 5.
Data Path X X X
On-die Memories X X X 13.