Data Sheet

Interconnects—Ethernet Controller I210
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When the internal PHY is in SPD and detects link activity, it re-negotiates link speed based on the power
state and the Low Power Link Up bits as defined by the PHPM.D0LPLU and PHPM.LPLU bits.
Note: The PHY does not enter SPD unless auto-negotiation is enabled.
While in SPD, the PHY powers down all circuits not required for detection of link activity. The PHY must
still be able to detect link pulses (including parallel detect) and wake up to engage in link negotiation.
The PHY does not send link pulses (NLP) while in SPD.
Notes: While in the link-disconnect state, the PHY must allow software access to its registers.
The link-disconnect state applies to all power management states (Dr, D0u, D0a, D3).
The link might change status, that is go up or go down, while in any of these states.
3.7.8.5.5.1 Internal PHY Back-to-Back SPD
While in link disconnect, the I210 monitors the link for link pulses to identify when a link is re-
connected. The I210 also periodically transmits pulses (every second) to resolve the case of two I210
devices (or devices with I210-like behavior) connected to each other across the link. Otherwise, two
such devices might be locked in SPD, not capable of identifying that a link was re-connected.
Back-to-back SPD is enabled by the SPD_B2B_EN bit in the PHPM register. The default value is enabled.
The Enable bit applies to SPD.
Note: This bit should not be altered by software once the I210 was set in SPD. If software requires
changing the back-to-back status, it first needs to transition the PHY out of SPD and only then
change the back-to-back bit to the required state.
3.7.8.5.6 Internal PHY Link Energy Detect
The I210 asserts the Link Energy Detect bit (PHPM.Link Energy Detect) each time energy is not
detected on the link. This bit provides an indication of a cable becoming plugged or unplugged.
This bit is valid only if PHPM.Go Link disconnect is set to 1b.
In order to correctly deduce that there is no energy, the bit must read 0b for three consecutive reads
each second.
3.7.8.5.7 Internal PHY Power-Down State
The I210 port enters a power-down state when the port’s clients are disabled and therefore the internal
PHY has no need to maintain a link. This can happen in one of the following cases:
1. D3/Dr state - Internal PHY enters a low-power state if the following conditions are met:
a. The LAN function is in a non-D0 state
b. APM WOL is inactive
c. Manageability doesn't use this port.
d. ACPI PME is disabled for this port.
e. The Dynamic Device Off Enable Flash bit is set (word 0x1E.14)
f. WUC.PPROXYE and MANC.MPROXYE bits are set to 1b
2. SerDes mode - Internal PHY is disabled when its LAN function is configured to SerDes mode.