Datasheet
Datasheet 27
Electrical Specifications
NOTES:
1. The loadline specification includes both static and transient limits except for overshoot allowed as shown in
Section 2.12.
2. This loadline specification shows the deviation from the VID set point.
3. The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE lands. Voltage
regulation feedback for voltage regulator circuits must be taken from processor V
CC
and V
SS
lands. Refer to
the Voltage Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 Socket for socket loadline
guidelines and VR implementation details.
Figure 2-3. V
CC
Static and Transient Tolerance for 775_VR_CONFIG_04B
VID - 0.000
VID - 0.019
VID - 0.038
VID - 0.057
VID - 0.076
VID - 0.095
VID - 0.114
VID - 0.133
VID - 0.152
VID - 0.171
VID - 0.190
VID - 0.209
VID - 0.228
0 102030405060708090100110120
Icc [A]
Vcc [V]
Vcc Maximum
Vcc Typical
Vcc Minimum
Table 2-11. GTL+ Asynchronous Signal Group DC Specifications
Symbol Parameter Min Max Unit Notes
1
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
IL
Input Low Voltage 0.0 V
TT
/2 – (0.10 * V
TT
)V
2, 3
2. V
IL
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals V
IH
= GTLREF + (0.10 * V
TT
) and
V
IL
= GTLREF – (0.10 * V
TT
).
V
IH
Input High Voltage V
TT
/2 + (0.10 * V
TT
)V
TT
V
3, 4, 5, 6
4. V
IH
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. V
IH
and V
OH
may experience excursions above V
TT
. However, input signal drivers must comply with the signal quality spec-
ifications.
V
OH
Output High Voltage 0.90*V
TT
V
TT
V
5, 6,
7
I
OL
Output Low Current —
V
TT
/[(0.50*R
TT_MIN
) +
R
ON_MIN
]
A
8
I
LI
Input Leakage Current N/A ± 200 µA
9
I
LO
Output Leakage Current N/A ± 200 µA
10
R
ON
Buffer On Resistance 8 12 Ω -